FreeRTOS-STM32F1源码
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H512C233S88SCT82LD38TXT11ICF6IOC4UVOPTX4UVPROJX4YML3无扩展名3
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3.7 KB all_code/.cmsis/device/ARM/ARMCA5/Config/mem_ARMCA5.h
1.7 KB all_code/.cmsis/device/ARM/ARMCA5/Config/system_ARMCA5.h
8.8 KB all_code/.cmsis/device/ARM/ARMCA5/Include/ARMCA5.h
2.5 KB all_code/.cmsis/device/ARM/ARMCA5/Source/AC5/ARMCA5.sct
5.4 KB all_code/.cmsis/device/ARM/ARMCA5/Source/AC5/startup_ARMCA5.c
2.6 KB all_code/.cmsis/device/ARM/ARMCA5/Source/AC6/ARMCA5.sct
6.2 KB all_code/.cmsis/device/ARM/ARMCA5/Source/AC6/startup_ARMCA5.c
3.9 KB all_code/.cmsis/device/ARM/ARMCA5/Source/GCC/ARMCA5.ld
2.6 KB all_code/.cmsis/device/ARM/ARMCA5/Source/GCC/ARMCA5.sct
6.2 KB all_code/.cmsis/device/ARM/ARMCA5/Source/GCC/startup_ARMCA5.c
3.7 KB all_code/.cmsis/device/ARM/ARMCA5/Source/IAR/ARMCA5.icf
4.1 KB all_code/.cmsis/device/ARM/ARMCA5/Source/IAR/startup_ARMCA5.s
13.2 KB all_code/.cmsis/device/ARM/ARMCA5/Source/mmu_ARMCA5.c
2.6 KB all_code/.cmsis/device/ARM/ARMCA5/Source/system_ARMCA5.c
3.7 KB all_code/.cmsis/device/ARM/ARMCA7/Config/mem_ARMCA7.h
1.7 KB all_code/.cmsis/device/ARM/ARMCA7/Config/system_ARMCA7.h
8.5 KB all_code/.cmsis/device/ARM/ARMCA7/Include/ARMCA7.h
2.5 KB all_code/.cmsis/device/ARM/ARMCA7/Source/AC5/ARMCA7.sct
5.4 KB all_code/.cmsis/device/ARM/ARMCA7/Source/AC5/startup_ARMCA7.c
2.6 KB all_code/.cmsis/device/ARM/ARMCA7/Source/AC6/ARMCA7.sct
6.2 KB all_code/.cmsis/device/ARM/ARMCA7/Source/AC6/startup_ARMCA7.c
3.9 KB all_code/.cmsis/device/ARM/ARMCA7/Source/GCC/ARMCA7.ld
6.2 KB all_code/.cmsis/device/ARM/ARMCA7/Source/GCC/startup_ARMCA7.c
3.7 KB all_code/.cmsis/device/ARM/ARMCA7/Source/IAR/ARMCA7.icf
4.1 KB all_code/.cmsis/device/ARM/ARMCA7/Source/IAR/startup_ARMCA7.s
13.2 KB all_code/.cmsis/device/ARM/ARMCA7/Source/mmu_ARMCA7.c
2.6 KB all_code/.cmsis/device/ARM/ARMCA7/Source/system_ARMCA7.c
3.7 KB all_code/.cmsis/device/ARM/ARMCA9/Config/mem_ARMCA9.h
1.7 KB all_code/.cmsis/device/ARM/ARMCA9/Config/system_ARMCA9.h
8.9 KB all_code/.cmsis/device/ARM/ARMCA9/Include/ARMCA9.h
2.5 KB all_code/.cmsis/device/ARM/ARMCA9/Source/AC5/ARMCA9.sct
5.4 KB all_code/.cmsis/device/ARM/ARMCA9/Source/AC5/startup_ARMCA9.c
2.6 KB all_code/.cmsis/device/ARM/ARMCA9/Source/AC6/ARMCA9.sct
6.2 KB all_code/.cmsis/device/ARM/ARMCA9/Source/AC6/startup_ARMCA9.c
3.9 KB all_code/.cmsis/device/ARM/ARMCA9/Source/GCC/ARMCA9.ld
6.2 KB all_code/.cmsis/device/ARM/ARMCA9/Source/GCC/startup_ARMCA9.c
3.7 KB all_code/.cmsis/device/ARM/ARMCA9/Source/IAR/ARMCA9.icf
4.1 KB all_code/.cmsis/device/ARM/ARMCA9/Source/IAR/startup_ARMCA9.s
13.2 KB all_code/.cmsis/device/ARM/ARMCA9/Source/mmu_ARMCA9.c
2.6 KB all_code/.cmsis/device/ARM/ARMCA9/Source/system_ARMCA9.c
4.3 KB all_code/.cmsis/device/ARM/ARMCM0/Include/ARMCM0.h
1.6 KB all_code/.cmsis/device/ARM/ARMCM0/Include/system_ARMCM0.h
2.6 KB all_code/.cmsis/device/ARM/ARMCM0/Source/ARM/ARMCM0_ac5.sct
2.6 KB all_code/.cmsis/device/ARM/ARMCM0/Source/ARM/ARMCM0_ac6.sct
6.2 KB all_code/.cmsis/device/ARM/ARMCM0/Source/ARM/startup_ARMCM0.s
6.8 KB all_code/.cmsis/device/ARM/ARMCM0/Source/GCC/gcc_arm.ld
7.2 KB all_code/.cmsis/device/ARM/ARMCM0/Source/GCC/startup_ARMCM0.S
5.6 KB all_code/.cmsis/device/ARM/ARMCM0/Source/IAR/startup_ARMCM0.s
6.3 KB all_code/.cmsis/device/ARM/ARMCM0/Source/startup_ARMCM0.c
2.0 KB all_code/.cmsis/device/ARM/ARMCM0/Source/system_ARMCM0.c
4.4 KB all_code/.cmsis/device/ARM/ARMCM0plus/Include/ARMCM0plus_MPU.h
4.3 KB all_code/.cmsis/device/ARM/ARMCM0plus/Include/ARMCM0plus.h
1.6 KB all_code/.cmsis/device/ARM/ARMCM0plus/Include/system_ARMCM0plus.h
2.6 KB all_code/.cmsis/device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac5.sct
2.6 KB all_code/.cmsis/device/ARM/ARMCM0plus/Source/ARM/ARMCM0plus_ac6.sct
6.2 KB all_code/.cmsis/device/ARM/ARMCM0plus/Source/ARM/startup_ARMCM0plus.s
6.8 KB all_code/.cmsis/device/ARM/ARMCM0plus/Source/GCC/gcc_arm.ld
7.2 KB all_code/.cmsis/device/ARM/ARMCM0plus/Source/GCC/startup_ARMCM0plus.S
5.6 KB all_code/.cmsis/device/ARM/ARMCM0plus/Source/IAR/startup_ARMCM0plus.s
6.4 KB all_code/.cmsis/device/ARM/ARMCM0plus/Source/startup_ARMCM0plus.c
2.1 KB all_code/.cmsis/device/ARM/ARMCM0plus/Source/system_ARMCM0plus.c
4.3 KB all_code/.cmsis/device/ARM/ARMCM1/Include/ARMCM1.h
1.6 KB all_code/.cmsis/device/ARM/ARMCM1/Include/system_ARMCM1.h
2.6 KB all_code/.cmsis/device/ARM/ARMCM1/Source/ARM/ARMCM1_ac5.sct
2.6 KB all_code/.cmsis/device/ARM/ARMCM1/Source/ARM/ARMCM1_ac6.sct
6.2 KB all_code/.cmsis/device/ARM/ARMCM1/Source/ARM/startup_ARMCM1.s
6.8 KB all_code/.cmsis/device/ARM/ARMCM1/Source/GCC/gcc_arm.ld
7.2 KB all_code/.cmsis/device/ARM/ARMCM1/Source/GCC/startup_ARMCM1.S
5.6 KB all_code/.cmsis/device/ARM/ARMCM1/Source/IAR/startup_ARMCM1.s
6.3 KB all_code/.cmsis/device/ARM/ARMCM1/Source/startup_ARMCM1.c
2.0 KB all_code/.cmsis/device/ARM/ARMCM1/Source/system_ARMCM1.c
4.4 KB all_code/.cmsis/device/ARM/ARMCM23/Include/ARMCM23_TZ.h
4.4 KB all_code/.cmsis/device/ARM/ARMCM23/Include/ARMCM23.h
1.6 KB all_code/.cmsis/device/ARM/ARMCM23/Include/system_ARMCM23.h
28.5 KB all_code/.cmsis/device/ARM/ARMCM23/Include/Template/partition_ARMCM23.h
4.3 KB all_code/.cmsis/device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6_s.sct
4.3 KB all_code/.cmsis/device/ARM/ARMCM23/Source/ARM/ARMCM23_ac6.sct
6.5 KB all_code/.cmsis/device/ARM/ARMCM23/Source/ARM/startup_ARMCM23.S
7.3 KB all_code/.cmsis/device/ARM/ARMCM23/Source/GCC/gcc_arm.ld
7.9 KB all_code/.cmsis/device/ARM/ARMCM23/Source/GCC/startup_ARMCM23.S
6.4 KB all_code/.cmsis/device/ARM/ARMCM23/Source/IAR/startup_ARMCM23.s
6.8 KB all_code/.cmsis/device/ARM/ARMCM23/Source/startup_ARMCM23.c
2.7 KB all_code/.cmsis/device/ARM/ARMCM23/Source/system_ARMCM23.c
4.6 KB all_code/.cmsis/device/ARM/ARMCM3/Include/ARMCM3.h
1.6 KB all_code/.cmsis/device/ARM/ARMCM3/Include/system_ARMCM3.h
2.6 KB all_code/.cmsis/device/ARM/ARMCM3/Source/ARM/ARMCM3_ac5.sct
2.6 KB all_code/.cmsis/device/ARM/ARMCM3/Source/ARM/ARMCM3_ac6.sct
6.5 KB all_code/.cmsis/device/ARM/ARMCM3/Source/ARM/startup_ARMCM3.s
6.8 KB all_code/.cmsis/device/ARM/ARMCM3/Source/GCC/gcc_arm.ld
7.4 KB all_code/.cmsis/device/ARM/ARMCM3/Source/GCC/startup_ARMCM3.S
5.9 KB all_code/.cmsis/device/ARM/ARMCM3/Source/IAR/startup_ARMCM3.s
6.7 KB all_code/.cmsis/device/ARM/ARMCM3/Source/startup_ARMCM3.c
2.4 KB all_code/.cmsis/device/ARM/ARMCM3/Source/system_ARMCM3.c
5.0 KB all_code/.cmsis/device/ARM/ARMCM33/Include/ARMCM33_DSP_FP_TZ.h
5.0 KB all_code/.cmsis/device/ARM/ARMCM33/Include/ARMCM33_DSP_FP.h
5.0 KB all_code/.cmsis/device/ARM/ARMCM33/Include/ARMCM33_TZ.h
5.0 KB all_code/.cmsis/device/ARM/ARMCM33/Include/ARMCM33.h
1.6 KB all_code/.cmsis/device/ARM/ARMCM33/Include/system_ARMCM33.h
48.2 KB all_code/.cmsis/device/ARM/ARMCM33/Include/Template/partition_ARMCM33.h
4.3 KB all_code/.cmsis/device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6_s.sct
4.3 KB all_code/.cmsis/device/ARM/ARMCM33/Source/ARM/ARMCM33_ac6.sct
6.8 KB all_code/.cmsis/device/ARM/ARMCM33/Source/ARM/startup_ARMCM33.S
7.3 KB all_code/.cmsis/device/ARM/ARMCM33/Source/GCC/gcc_arm.ld
8.1 KB all_code/.cmsis/device/ARM/ARMCM33/Source/GCC/startup_ARMCM33.S
6.7 KB all_code/.cmsis/device/ARM/ARMCM33/Source/IAR/startup_ARMCM33.s
7.4 KB all_code/.cmsis/device/ARM/ARMCM33/Source/startup_ARMCM33.c
3.2 KB all_code/.cmsis/device/ARM/ARMCM33/Source/system_ARMCM33.c
5.0 KB all_code/.cmsis/device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP_TZ.h
5.0 KB all_code/.cmsis/device/ARM/ARMCM35P/Include/ARMCM35P_DSP_FP.h
5.0 KB all_code/.cmsis/device/ARM/ARMCM35P/Include/ARMCM35P_TZ.h
5.0 KB all_code/.cmsis/device/ARM/ARMCM35P/Include/ARMCM35P.h
1.6 KB all_code/.cmsis/device/ARM/ARMCM35P/Include/system_ARMCM35P.h
48.2 KB all_code/.cmsis/device/ARM/ARMCM35P/Include/Template/partition_ARMCM35P.h
4.3 KB all_code/.cmsis/device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6_s.sct
4.3 KB all_code/.cmsis/device/ARM/ARMCM35P/Source/ARM/ARMCM35P_ac6.sct
6.8 KB all_code/.cmsis/device/ARM/ARMCM35P/Source/ARM/startup_ARMCM35P.S
7.3 KB all_code/.cmsis/device/ARM/ARMCM35P/Source/GCC/gcc_arm.ld
8.1 KB all_code/.cmsis/device/ARM/ARMCM35P/Source/GCC/startup_ARMCM35P.S
6.7 KB all_code/.cmsis/device/ARM/ARMCM35P/Source/IAR/startup_ARMCM35P.s
7.4 KB all_code/.cmsis/device/ARM/ARMCM35P/Source/startup_ARMCM35P.c
3.2 KB all_code/.cmsis/device/ARM/ARMCM35P/Source/system_ARMCM35P.c
4.7 KB all_code/.cmsis/device/ARM/ARMCM4/Include/ARMCM4_FP.h
4.7 KB all_code/.cmsis/device/ARM/ARMCM4/Include/ARMCM4.h
1.6 KB all_code/.cmsis/device/ARM/ARMCM4/Include/system_ARMCM4.h
2.6 KB all_code/.cmsis/device/ARM/ARMCM4/Source/ARM/ARMCM4_ac5.sct
2.6 KB all_code/.cmsis/device/ARM/ARMCM4/Source/ARM/ARMCM4_ac6.sct
6.5 KB all_code/.cmsis/device/ARM/ARMCM4/Source/ARM/startup_ARMCM4.s
6.8 KB all_code/.cmsis/device/ARM/ARMCM4/Source/GCC/gcc_arm.ld
7.4 KB all_code/.cmsis/device/ARM/ARMCM4/Source/GCC/startup_ARMCM4.S
5.9 KB all_code/.cmsis/device/ARM/ARMCM4/Source/IAR/startup_ARMCM4.s
6.8 KB all_code/.cmsis/device/ARM/ARMCM4/Source/startup_ARMCM4.c
2.8 KB all_code/.cmsis/device/ARM/ARMCM4/Source/system_ARMCM4.c
5.3 KB all_code/.cmsis/device/ARM/ARMCM55/Include/ARMCM55.h
1.6 KB all_code/.cmsis/device/ARM/ARMCM55/Include/system_ARMCM55.h
48.3 KB all_code/.cmsis/device/ARM/ARMCM55/Include/Template/partition_ARMCM55.h
4.3 KB all_code/.cmsis/device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6_s.sct
4.3 KB all_code/.cmsis/device/ARM/ARMCM55/Source/ARM/ARMCM55_ac6.sct
7.3 KB all_code/.cmsis/device/ARM/ARMCM55/Source/GCC/gcc_arm.ld
7.2 KB all_code/.cmsis/device/ARM/ARMCM55/Source/startup_ARMCM55.c
3.6 KB all_code/.cmsis/device/ARM/ARMCM55/Source/system_ARMCM55.c
5.0 KB all_code/.cmsis/device/ARM/ARMCM7/Include/ARMCM7_DP.h
5.0 KB all_code/.cmsis/device/ARM/ARMCM7/Include/ARMCM7_SP.h
5.0 KB all_code/.cmsis/device/ARM/ARMCM7/Include/ARMCM7.h
1.6 KB all_code/.cmsis/device/ARM/ARMCM7/Include/system_ARMCM7.h
2.6 KB all_code/.cmsis/device/ARM/ARMCM7/Source/ARM/ARMCM7_ac5.sct
2.6 KB all_code/.cmsis/device/ARM/ARMCM7/Source/ARM/ARMCM7_ac6.sct
6.5 KB all_code/.cmsis/device/ARM/ARMCM7/Source/ARM/startup_ARMCM7.s
6.8 KB all_code/.cmsis/device/ARM/ARMCM7/Source/GCC/gcc_arm.ld
7.4 KB all_code/.cmsis/device/ARM/ARMCM7/Source/GCC/startup_ARMCM7.S
5.9 KB all_code/.cmsis/device/ARM/ARMCM7/Source/IAR/startup_ARMCM7.s
6.8 KB all_code/.cmsis/device/ARM/ARMCM7/Source/startup_ARMCM7.c
2.8 KB all_code/.cmsis/device/ARM/ARMCM7/Source/system_ARMCM7.c
5.4 KB all_code/.cmsis/device/ARM/ARMCM85/Include/ARMCM85.h
1.6 KB all_code/.cmsis/device/ARM/ARMCM85/Include/system_ARMCM85.h
49.1 KB all_code/.cmsis/device/ARM/ARMCM85/Include/Template/partition_ARMCM85.h
4.6 KB all_code/.cmsis/device/ARM/ARMCM85/Source/ARM/ARMCM85_ac6_s.sct
4.6 KB all_code/.cmsis/device/ARM/ARMCM85/Source/ARM/ARMCM85_ac6.sct
7.2 KB all_code/.cmsis/device/ARM/ARMCM85/Source/GCC/gcc_arm.ld
7.2 KB all_code/.cmsis/device/ARM/ARMCM85/Source/startup_ARMCM85.c
3.7 KB all_code/.cmsis/device/ARM/ARMCM85/Source/system_ARMCM85.c
4.3 KB all_code/.cmsis/device/ARM/ARMSC000/Include/ARMSC000.h
1.6 KB all_code/.cmsis/device/ARM/ARMSC000/Include/system_ARMSC000.h
2.6 KB all_code/.cmsis/device/ARM/ARMSC000/Source/ARM/ARMSC000_ac5.sct
2.6 KB all_code/.cmsis/device/ARM/ARMSC000/Source/ARM/ARMSC000_ac6.sct
6.2 KB all_code/.cmsis/device/ARM/ARMSC000/Source/ARM/startup_ARMSC000.s
6.8 KB all_code/.cmsis/device/ARM/ARMSC000/Source/GCC/gcc_arm.ld
7.2 KB all_code/.cmsis/device/ARM/ARMSC000/Source/GCC/startup_ARMSC000.S
5.6 KB all_code/.cmsis/device/ARM/ARMSC000/Source/IAR/startup_ARMSC000.s
6.3 KB all_code/.cmsis/device/ARM/ARMSC000/Source/startup_ARMSC000.c
2.0 KB all_code/.cmsis/device/ARM/ARMSC000/Source/system_ARMSC000.c
4.6 KB all_code/.cmsis/device/ARM/ARMSC300/Include/ARMSC300.h
1.6 KB all_code/.cmsis/device/ARM/ARMSC300/Include/system_ARMSC300.h
2.6 KB all_code/.cmsis/device/ARM/ARMSC300/Source/ARM/ARMSC300_ac5.sct
2.6 KB all_code/.cmsis/device/ARM/ARMSC300/Source/ARM/ARMSC300_ac6.sct
6.5 KB all_code/.cmsis/device/ARM/ARMSC300/Source/ARM/startup_ARMSC300.s
6.8 KB all_code/.cmsis/device/ARM/ARMSC300/Source/GCC/gcc_arm.ld
7.4 KB all_code/.cmsis/device/ARM/ARMSC300/Source/GCC/startup_ARMSC300.S
5.9 KB all_code/.cmsis/device/ARM/ARMSC300/Source/IAR/startup_ARMSC300.s
6.7 KB all_code/.cmsis/device/ARM/ARMSC300/Source/startup_ARMSC300.c
2.5 KB all_code/.cmsis/device/ARM/ARMSC300/Source/system_ARMSC300.c
5.4 KB all_code/.cmsis/device/ARM/ARMv81MML/Include/ARMv81MML_DSP_DP_MVE_FP.h
1.6 KB all_code/.cmsis/device/ARM/ARMv81MML/Include/system_ARMv81MML.h
48.4 KB all_code/.cmsis/device/ARM/ARMv81MML/Include/Template/partition_ARMv81MML.h
4.3 KB all_code/.cmsis/device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6_s.sct
4.3 KB all_code/.cmsis/device/ARM/ARMv81MML/Source/ARM/ARMv81MML_ac6.sct
7.3 KB all_code/.cmsis/device/ARM/ARMv81MML/Source/GCC/gcc_arm.ld
7.2 KB all_code/.cmsis/device/ARM/ARMv81MML/Source/startup_ARMv81MML.c
3.1 KB all_code/.cmsis/device/ARM/ARMv81MML/Source/system_ARMv81MML.c
4.4 KB all_code/.cmsis/device/ARM/ARMv8MBL/Include/ARMv8MBL.h
1.6 KB all_code/.cmsis/device/ARM/ARMv8MBL/Include/system_ARMv8MBL.h
47.2 KB all_code/.cmsis/device/ARM/ARMv8MBL/Include/Template/partition_ARMv8MBL.h
4.3 KB all_code/.cmsis/device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6_s.sct
4.3 KB all_code/.cmsis/device/ARM/ARMv8MBL/Source/ARM/ARMv8MBL_ac6.sct
6.5 KB all_code/.cmsis/device/ARM/ARMv8MBL/Source/ARM/startup_ARMv8MBL.S
7.3 KB all_code/.cmsis/device/ARM/ARMv8MBL/Source/GCC/gcc_arm.ld
7.9 KB all_code/.cmsis/device/ARM/ARMv8MBL/Source/GCC/startup_ARMv8MBL.S
5.6 KB all_code/.cmsis/device/ARM/ARMv8MBL/Source/IAR/startup_ARMv8MBL.s
6.7 KB all_code/.cmsis/device/ARM/ARMv8MBL/Source/startup_ARMv8MBL.c
2.6 KB all_code/.cmsis/device/ARM/ARMv8MBL/Source/system_ARMv8MBL.c
5.1 KB all_code/.cmsis/device/ARM/ARMv8MML/Include/ARMv8MML_DP.h
5.1 KB all_code/.cmsis/device/ARM/ARMv8MML/Include/ARMv8MML_DSP_DP.h
5.2 KB all_code/.cmsis/device/ARM/ARMv8MML/Include/ARMv8MML_DSP_SP.h
5.1 KB all_code/.cmsis/device/ARM/ARMv8MML/Include/ARMv8MML_DSP.h
5.1 KB all_code/.cmsis/device/ARM/ARMv8MML/Include/ARMv8MML_SP.h
5.0 KB all_code/.cmsis/device/ARM/ARMv8MML/Include/ARMv8MML.h
1.6 KB all_code/.cmsis/device/ARM/ARMv8MML/Include/system_ARMv8MML.h
48.2 KB all_code/.cmsis/device/ARM/ARMv8MML/Include/Template/partition_ARMv8MML.h
4.3 KB all_code/.cmsis/device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6_s.sct
4.3 KB all_code/.cmsis/device/ARM/ARMv8MML/Source/ARM/ARMv8MML_ac6.sct
6.8 KB all_code/.cmsis/device/ARM/ARMv8MML/Source/ARM/startup_ARMv8MML.S
7.3 KB all_code/.cmsis/device/ARM/ARMv8MML/Source/GCC/gcc_arm.ld
8.1 KB all_code/.cmsis/device/ARM/ARMv8MML/Source/GCC/startup_ARMv8MML.S
6.0 KB all_code/.cmsis/device/ARM/ARMv8MML/Source/IAR/startup_ARMv8MML.s
7.5 KB all_code/.cmsis/device/ARM/ARMv8MML/Source/startup_ARMv8MML.c
3.2 KB all_code/.cmsis/device/ARM/ARMv8MML/Source/system_ARMv8MML.c
11.8 KB all_code/.cmsis/include/cachel1_armv7.h
27.3 KB all_code/.cmsis/include/cmsis_armcc.h
54.7 KB all_code/.cmsis/include/cmsis_armclang_ltm.h
47.3 KB all_code/.cmsis/include/cmsis_armclang.h
9.3 KB all_code/.cmsis/include/cmsis_compiler.h
61.9 KB all_code/.cmsis/include/cmsis_gcc.h
28.4 KB all_code/.cmsis/include/cmsis_iccarm.h
1.6 KB all_code/.cmsis/include/cmsis_version.h
270.2 KB all_code/.cmsis/include/core_armv81mml.h
112.3 KB all_code/.cmsis/include/core_armv8mbl.h
178.9 KB all_code/.cmsis/include/core_armv8mml.h
40.7 KB all_code/.cmsis/include/core_cm0.h
48.7 KB all_code/.cmsis/include/core_cm0plus.h
41.6 KB all_code/.cmsis/include/core_cm1.h
118.7 KB all_code/.cmsis/include/core_cm23.h
107.0 KB all_code/.cmsis/include/core_cm3.h
185.1 KB all_code/.cmsis/include/core_cm33.h
185.1 KB all_code/.cmsis/include/core_cm35p.h
118.1 KB all_code/.cmsis/include/core_cm4.h
310.0 KB all_code/.cmsis/include/core_cm55.h
135.7 KB all_code/.cmsis/include/core_cm7.h
301.1 KB all_code/.cmsis/include/core_cm85.h
45.5 KB all_code/.cmsis/include/core_sc000.h
106.0 KB all_code/.cmsis/include/core_sc300.h
188.5 KB all_code/.cmsis/include/core_starmc1.h
11.5 KB all_code/.cmsis/include/mpu_armv7.h
11.1 KB all_code/.cmsis/include/mpu_armv8.h
5.9 KB all_code/.cmsis/include/pac_armv81.h
22.3 KB all_code/.cmsis/include/pmu_armv8.h
2.6 KB all_code/.cmsis/include/tz_context.h
8.2 KB all_code/.eide/eide.yml
689 B all_code/.eide/files.options.yml
8.0 KB all_code/all_code.ioc
1.3 KB all_code/Core/Inc/adc.h
6.7 KB all_code/Core/Inc/FreeRTOSConfig.h
1.3 KB all_code/Core/Inc/gpio.h
1.3 KB all_code/Core/Inc/i2c.h
2.0 KB all_code/Core/Inc/main.h
1.3 KB all_code/Core/Inc/spi.h
15.3 KB all_code/Core/Inc/stm32f1xx_hal_conf.h
1.9 KB all_code/Core/Inc/stm32f1xx_it.h
1.4 KB all_code/Core/Inc/tim.h
3.0 KB all_code/Core/Src/adc.c
12.1 KB all_code/Core/Src/freertos.c
3.2 KB all_code/Core/Src/gpio.c
2.9 KB all_code/Core/Src/i2c.c
6.2 KB all_code/Core/Src/main.c
3.2 KB all_code/Core/Src/spi.c
2.4 KB all_code/Core/Src/stm32f1xx_hal_msp.c
4.4 KB all_code/Core/Src/stm32f1xx_hal_timebase_tim.c
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12.5 KB try/Middlewares/Third_Party/FreeRTOS/Source/croutine.c
25.4 KB try/Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
25.2 KB try/Middlewares/Third_Party/FreeRTOS/Source/include/croutine.h
7.1 KB try/Middlewares/Third_Party/FreeRTOS/Source/include/deprecated_definitions.h
29.0 KB try/Middlewares/Third_Party/FreeRTOS/Source/include/event_groups.h
41.8 KB try/Middlewares/Third_Party/FreeRTOS/Source/include/FreeRTOS.h
17.7 KB try/Middlewares/Third_Party/FreeRTOS/Source/include/list.h
36.5 KB try/Middlewares/Third_Party/FreeRTOS/Source/include/message_buffer.h
13.5 KB try/Middlewares/Third_Party/FreeRTOS/Source/include/mpu_prototypes.h
9.0 KB try/Middlewares/Third_Party/FreeRTOS/Source/include/mpu_wrappers.h
7.8 KB try/Middlewares/Third_Party/FreeRTOS/Source/include/portable.h
5.5 KB try/Middlewares/Third_Party/FreeRTOS/Source/include/projdefs.h
58.7 KB try/Middlewares/Third_Party/FreeRTOS/Source/include/queue.h
46.0 KB try/Middlewares/Third_Party/FreeRTOS/Source/include/semphr.h
5.7 KB try/Middlewares/Third_Party/FreeRTOS/Source/include/stack_macros.h
5.9 KB try/Middlewares/Third_Party/FreeRTOS/Source/include/StackMacros.h
36.8 KB try/Middlewares/Third_Party/FreeRTOS/Source/include/stream_buffer.h
102.8 KB try/Middlewares/Third_Party/FreeRTOS/Source/include/task.h
58.8 KB try/Middlewares/Third_Party/FreeRTOS/Source/include/timers.h
1.1 KB try/Middlewares/Third_Party/FreeRTOS/Source/LICENSE
8.1 KB try/Middlewares/Third_Party/FreeRTOS/Source/list.c
15.3 KB try/Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
24.9 KB try/Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM3/port.c
7.9 KB try/Middlewares/Third_Party/FreeRTOS/Source/portable/RVDS/ARM_CM3/portmacro.h
91.5 KB try/Middlewares/Third_Party/FreeRTOS/Source/queue.c
41.5 KB try/Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
169.3 KB try/Middlewares/Third_Party/FreeRTOS/Source/tasks.c
39.1 KB try/Middlewares/Third_Party/FreeRTOS/Source/timers.c
5.4 KB try/try.ioc可读文件预览
README.txt301 B
FreeRTOS-STM32F1源码
本压缩包由开源协会知识库从学习目录中自动精选生成。
已排除安装包、视频、编译缓存、目标文件、可执行文件、私钥和大型第三方依赖。
部分工程需要通过对应 IDE、SDK 或配置文件重新生成依赖后再编译。all_code/Drivers/CMSIS/LICENSE.txt11.3 KB
Apache License
Version 2.0, January 2004
http://www.apache.org/licenses/
TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
1. Definitions.
"License" shall mean the terms and conditions for use, reproduction,
and distribution as defined by Sections 1 through 9 of this document.
"Licensor" shall mean the copyright owner or entity authorized by
the copyright owner that is granting the License.
"Legal Entity" shall mean the union of the acting entity and all
other entities that control, are controlled by, or are under common
control with that entity. For the purposes of this definition,
"control" means (i) the power, direct or indirect, to cause the
direction or management of such entity, whether by contract or
otherwise, or (ii) ownership of fifty percent (50%) or more of the
outstanding shares, or (iii) beneficial ownership of such entity.
"You" (or "Your") shall mean an individual or Legal Entity
exercising permissions granted by this License.
"Source" form shall mean the preferred form for making modifications,
including but not limited to software source code, documentation
source, and configuration files.
"Object" form shall mean any form resulting from mechanical
transformation or translation of a Source form, including but
not limited to compiled object code, generated documentation,
and conversions to other media types.
"Work" shall mean the work of authorship, whether in Source or
Object form, made available under the License, as indicated by a
copyright notice that is included in or attached to the work
(an example is provided in the Appendix below).
"Derivative Works" shall mean any work, whether in Source or Object
form, that is based on (or derived from) the Work and for which the
editorial revisions, annotations, elaborations, or other modifications
represent, as a whole, an original work of authorship. For the purposes
of this License, Derivative Works shall not include works that remain
separable from, or merely link (or bind by name) to the interfaces of,
the Work and Derivative Works thereof.
"Contribution" shall mean any work of authorship, including
the original version of the Work and any modifications or additions
to that Work or Derivative Works thereof, that is intentionally
submitted to Licensor for inclusion in the Work by the copyright owner
or by an individual or Legal Entity authorized to submit on behalf of
the copyright owner. For the purposes of this definition, "submitted"
means any form of electronic, verbal, or written communication sent
to the Licensor or its representatives, including but not limited to
communication on electronic mailing lists, source code control systems,
and issue tracking systems that are managed by, or on behalf of, the
Licensor for the purpose of discussing and improving the Work, but
excluding communication that is conspicuously marked or otherwise
designated in writing by the copyright owner as "Not a Contribution."
"Contributor" shall mean Licensor and any individual or Legal Entity
on behalf of whom a Contribution has been received by Licensor and
subsequently incorporated within the Work.
2. Grant of Copyright License. Subject to the terms and conditions of
this License, each Contributor hereby grants to You a perpetual,
worldwide, non-exclusive, no-charge, royalty-free, irrevocable
copyright license to reproduce, prepare Derivative Works of,
publicly display, publicly perform, sublicense, and distribute the
Work and such Derivative Works in Source or Object form.
3. Grant of Patent License. Subject to the terms and conditions of
this License, each Contributor hereby grants to You a perpetual,
worldwide, non-exclusive, no-charge, royalty-free, irrevocable
(except as stated in this section) patent license to make, have made,
use, offer to sell, sell, import, and otherwise transfer the Work,
where such license applies only to those patent claims licensable
by such Contributor that are necessarily infringed by their
Contribution(s) alone or by combination of their Contribution(s)
with the Work to which such Contribution(s) was submitted. If You
institute patent litigation against any entity (including a
cross-claim or counterclaim in a lawsuit) alleging that the Work
or a Contribution incorporated within the Work constitutes direct
or contributory patent infringement, then any patent licenses
granted to You under this License for that Work shall terminate
as of the date such litigation is filed.
4. Redistribution. You may reproduce and distribute copies of the
Work or Derivative Works thereof in any medium, with or without
modifications, and in Source or Object form, provided that You
meet the following conditions:
(a) You must give any other recipients of the Work or
Derivative Works a copy of this License; and
(b) You must cause any modified files to carry prominent notices
stating that You changed the files; and
(c) You must retain, in the Source form of any Derivative Works
that You distribute, all copyright, patent, trademark, and
attribution notices from the Source form of the Work,
excluding those notices that do not pertain to any part of
the Derivative Works; and
(d) If the Work includes a "NOTICE" text file as part of its
distribution, then any Derivative Works that You distribute must
include a readable copy of the attribution notices contained
within such NOTICE file, excluding those notices that do not
pertain to any part of the Derivative Works, in at least one
of the following places: within a NOTICE text file distributed
as part of the Derivative Works; within the Source form or
documentation, if provided along with the Derivative Works; or,
within a display generated by the Derivative Works, if and
wherever such third-party notices normally appear. The contents
of the NOTICE file are for informational purposes only and
do not modify the License. You may add Your own attribution
notices within Derivative Works that You distribute, alongside
or as an addendum to the NOTICE text from the Work, provided
that such additional attribution notices cannot be construed
as modifying the License.
You may add Your own copyright statement to Your modifications and
may provide additional or different license terms and conditions
for use, reproduction, or distribution of Your modifications, or
for any such Derivative Works as a whole, provided Your use,
reproduction, and distribution of the Work otherwise complies with
the conditions stated in this License.
5. Submission of Contributions. Unless You explicitly state otherwise,
any Contribution intentionally submitted for inclusion in the Work
by You to the Licensor shall be under the terms and conditions of
this License, without any additional terms or conditions.
Notwithstanding the above, nothing herein shall supersede or modify
the terms of any separate license agreement you may have executed
with Licensor regarding such Contributions.
6. Trademarks. This License does not grant permission to use the trade
names, trademarks, service marks, or product names of the Licensor,
except as required for reasonable and customary use in describing the
origin of the Work and reproducing the content of the NOTICE file.
7. Disclaimer of Warranty. Unless required by applicable law or
agreed to in writing, Licensor provides the Work (and each
Contributor provides its Contributions) on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied, including, without limitation, any warranties or conditions
of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A
PARTICULAR PURPOSE. You are solely responsible for determining the
appropriateness of using or redistributing the Work and assume any
risks associated with Your exercise of permissions under this License.
8. Limitation of Liability. In no event and under no legal theory,
whether in tort (including negligence), contract, or otherwise,
unless required by applicable law (such as deliberate and grossly
negligent acts) or agreed to in writing, shall any Contributor be
liable to You for damages, including any direct, indirect, special,
incidental, or consequential damages of any character arising as a
result of this License or out of the use or inability to use the
Work (including but not limited to damages for loss of goodwill,
work stoppage, computer failure or malfunction, or any and all
other commercial damages or losses), even if such Contributor
has been advised of the possibility of such damages.
9. Accepting Warranty or Additional Liability. While redistributing
the Work or Derivative Works thereof, You may choose to offer,
and charge a fee for, acceptance of support, warranty, indemnity,
or other liability obligations and/or rights consistent with this
License. However, in accepting such obligations, You may act only
on Your own behalf and on Your sole responsibility, not on behalf
of any other Contributor, and only if You agree to indemnify,
defend, and hold each Contributor harmless for any liability
incurred by, or claims asserted against, such Contributor by reason
of your accepting any such warranty or additional liability.
END OF TERMS AND CONDITIONS
APPENDIX: How to apply the Apache License to your work.
To apply the Apache License to your work, attach the following
boilerplate notice, with the fields enclosed by brackets "{}"
replaced with your own identifying information. (Don't include
the brackets!) The text should be enclosed in the appropriate
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same "printed page" as the copyright notice for easier
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Copyright {yyyy} {name of copyright owner}
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
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Unless required by applicable law or agreed to in writing, software
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queue/Drivers/CMSIS/LICENSE.txt11.3 KB
Apache License
Version 2.0, January 2004
http://www.apache.org/licenses/
TERMS AND CONDITIONS FOR USE, REPRODUCTION, AND DISTRIBUTION
1. Definitions.
"License" shall mean the terms and conditions for use, reproduction,
and distribution as defined by Sections 1 through 9 of this document.
"Licensor" shall mean the copyright owner or entity authorized by
the copyright owner that is granting the License.
"Legal Entity" shall mean the union of the acting entity and all
other entities that control, are controlled by, or are under common
control with that entity. For the purposes of this definition,
"control" means (i) the power, direct or indirect, to cause the
direction or management of such entity, whether by contract or
otherwise, or (ii) ownership of fifty percent (50%) or more of the
outstanding shares, or (iii) beneficial ownership of such entity.
"You" (or "Your") shall mean an individual or Legal Entity
exercising permissions granted by this License.
"Source" form shall mean the preferred form for making modifications,
including but not limited to software source code, documentation
source, and configuration files.
"Object" form shall mean any form resulting from mechanical
transformation or translation of a Source form, including but
not limited to compiled object code, generated documentation,
and conversions to other media types.
"Work" shall mean the work of authorship, whether in Source or
Object form, made available under the License, as indicated by a
copyright notice that is included in or attached to the work
(an example is provided in the Appendix below).
"Derivative Works" shall mean any work, whether in Source or Object
form, that is based on (or derived from) the Work and for which the
editorial revisions, annotations, elaborations, or other modifications
represent, as a whole, an original work of authorship. For the purposes
of this License, Derivative Works shall not include works that remain
separable from, or merely link (or bind by name) to the interfaces of,
the Work and Derivative Works thereof.
"Contribution" shall mean any work of authorship, including
the original version of the Work and any modifications or additions
to that Work or Derivative Works thereof, that is intentionally
submitted to Licensor for inclusion in the Work by the copyright owner
or by an individual or Legal Entity authorized to submit on behalf of
the copyright owner. For the purposes of this definition, "submitted"
means any form of electronic, verbal, or written communication sent
to the Licensor or its representatives, including but not limited to
communication on electronic mailing lists, source code control systems,
and issue tracking systems that are managed by, or on behalf of, the
Licensor for the purpose of discussing and improving the Work, but
excluding communication that is conspicuously marked or otherwise
designated in writing by the copyright owner as "Not a Contribution."
"Contributor" shall mean Licensor and any individual or Legal Entity
on behalf of whom a Contribution has been received by Licensor and
subsequently incorporated within the Work.
2. Grant of Copyright License. Subject to the terms and conditions of
this License, each Contributor hereby grants to You a perpetual,
worldwide, non-exclusive, no-charge, royalty-free, irrevocable
copyright license to reproduce, prepare Derivative Works of,
publicly display, publicly perform, sublicense, and distribute the
Work and such Derivative Works in Source or Object form.
3. Grant of Patent License. Subject to the terms and conditions of
this License, each Contributor hereby grants to You a perpetual,
worldwide, non-exclusive, no-charge, royalty-free, irrevocable
(except as stated in this section) patent license to make, have made,
use, offer to sell, sell, import, and otherwise transfer the Work,
where such license applies only to those patent claims licensable
by such Contributor that are necessarily infringed by their
Contribution(s) alone or by combination of their Contribution(s)
with the Work to which such Contribution(s) was submitted. If You
institute patent litigation against any entity (including a
cross-claim or counterclaim in a lawsuit) alleging that the Work
or a Contribution incorporated within the Work constitutes direct
or contributory patent infringement, then any patent licenses
granted to You under this License for that Work shall terminate
as of the date such litigation is filed.
4. Redistribution. You may reproduce and distribute copies of the
Work or Derivative Works thereof in any medium, with or without
modifications, and in Source or Object form, provided that You
meet the following conditions:
(a) You must give any other recipients of the Work or
Derivative Works a copy of this License; and
(b) You must cause any modified files to carry prominent notices
stating that You changed the files; and
(c) You must retain, in the Source form of any Derivative Works
that You distribute, all copyright, patent, trademark, and
attribution notices from the Source form of the Work,
excluding those notices that do not pertain to any part of
the Derivative Works; and
(d) If the Work includes a "NOTICE" text file as part of its
distribution, then any Derivative Works that You distribute must
include a readable copy of the attribution notices contained
within such NOTICE file, excluding those notices that do not
pertain to any part of the Derivative Works, in at least one
of the following places: within a NOTICE text file distributed
as part of the Derivative Works; within the Source form or
documentation, if provided along with the Derivative Works; or,
within a display generated by the Derivative Works, if and
wherever such third-party notices normally appear. The contents
of the NOTICE file are for informational purposes only and
do not modify the License. You may add Your own attribution
notices within Derivative Works that You distribute, alongside
or as an addendum to the NOTICE text from the Work, provided
that such additional attribution notices cannot be construed
as modifying the License.
You may add Your own copyright statement to Your modifications and
may provide additional or different license terms and conditions
for use, reproduction, or distribution of Your modifications, or
for any such Derivative Works as a whole, provided Your use,
reproduction, and distribution of the Work otherwise complies with
the conditions stated in this License.
5. Submission of Contributions. Unless You explicitly state otherwise,
any Contribution intentionally submitted for inclusion in the Work
by You to the Licensor shall be under the terms and conditions of
this License, without any additional terms or conditions.
Notwithstanding the above, nothing herein shall supersede or modify
the terms of any separate license agreement you may have executed
with Licensor regarding such Contributions.
6. Trademarks. This License does not grant permission to use the trade
names, trademarks, service marks, or product names of the Licensor,
except as required for reasonable and customary use in describing the
origin of the Work and reproducing the content of the NOTICE file.
7. Disclaimer of Warranty. Unless required by applicable law or
agreed to in writing, Licensor provides the Work (and each
Contributor provides its Contributions) on an "AS IS" BASIS,
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
implied, including, without limitation, any warranties or conditions
of TITLE, NON-INFRINGEMENT, MERCHANTABILITY, or FITNESS FOR A
PARTICULAR PURPOSE. You are solely responsible for determining the
appropriateness of using or redistributing the Work and assume any
risks associated with Your exercise of permissions under this License.
8. Limitation of Liability. In no event and under no legal theory,
whether in tort (including negligence), contract, or otherwise,
unless required by applicable law (such as deliberate and grossly
negligent acts) or agreed to in writing, shall any Contributor be
liable to You for damages, including any direct, indirect, special,
incidental, or consequential damages of any character arising as a
result of this License or out of the use or inability to use the
Work (including but not limited to damages for loss of goodwill,
work stoppage, computer failure or malfunction, or any and all
other commercial damages or losses), even if such Contributor
has been advised of the possibility of such damages.
9. Accepting Warranty or Additional Liability. While redistributing
the Work or Derivative Works thereof, You may choose to offer,
and charge a fee for, acceptance of support, warranty, indemnity,
or other liability obligations and/or rights consistent with this
License. However, in accepting such obligations, You may act only
on Your own behalf and on Your sole responsibility, not on behalf
of any other Contributor, and only if You agree to indemnify,
defend, and hold each Contributor harmless for any liability
incurred by, or claims asserted against, such Contributor by reason
of your accepting any such warranty or additional liability.
END OF TERMS AND CONDITIONS
APPENDIX: How to apply the Apache License to your work.
To apply the Apache License to your work, attach the following
boilerplate notice, with the fields enclosed by brackets "{}"
replaced with your own identifying information. (Don't include
the brackets!) The text should be enclosed in the appropriate
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file or class name and description of purpose be included on the
same "printed page" as the copyright notice for easier
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Copyright {yyyy} {name of copyright owner}
Licensed under the Apache License, Version 2.0 (the "License");
you may not use this file except in compliance with the License.
You may obtain a copy of the License at
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WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
See the License for the specific language governing permissions and
limitations under the License.
all_code/Core/Src/adc.c3.0 KB
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file adc.c
* @brief This file provides code for the configuration
* of the ADC instances.
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "adc.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
ADC_HandleTypeDef hadc1;
/* ADC1 init function */
void MX_ADC1_Init(void)
{
/* USER CODE BEGIN ADC1_Init 0 */
/* USER CODE END ADC1_Init 0 */
ADC_ChannelConfTypeDef sConfig = {0};
/* USER CODE BEGIN ADC1_Init 1 */
/* USER CODE END ADC1_Init 1 */
/** Common config
*/
hadc1.Instance = ADC1;
hadc1.Init.ScanConvMode = ADC_SCAN_DISABLE;
hadc1.Init.ContinuousConvMode = DISABLE;
hadc1.Init.DiscontinuousConvMode = DISABLE;
hadc1.Init.ExternalTrigConv = ADC_SOFTWARE_START;
hadc1.Init.DataAlign = ADC_DATAALIGN_RIGHT;
hadc1.Init.NbrOfConversion = 1;
if (HAL_ADC_Init(&hadc1) != HAL_OK)
{
Error_Handler();
}
/** Configure Regular Channel
*/
sConfig.Channel = ADC_CHANNEL_3;
sConfig.Rank = ADC_REGULAR_RANK_1;
sConfig.SamplingTime = ADC_SAMPLETIME_1CYCLE_5;
if (HAL_ADC_ConfigChannel(&hadc1, &sConfig) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN ADC1_Init 2 */
/* USER CODE END ADC1_Init 2 */
}
void HAL_ADC_MspInit(ADC_HandleTypeDef* adcHandle)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(adcHandle->Instance==ADC1)
{
/* USER CODE BEGIN ADC1_MspInit 0 */
/* USER CODE END ADC1_MspInit 0 */
/* ADC1 clock enable */
__HAL_RCC_ADC1_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**ADC1 GPIO Configuration
PA3 ------> ADC1_IN3
*/
GPIO_InitStruct.Pin = GPIO_PIN_3;
GPIO_InitStruct.Mode = GPIO_MODE_ANALOG;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USER CODE BEGIN ADC1_MspInit 1 */
/* USER CODE END ADC1_MspInit 1 */
}
}
void HAL_ADC_MspDeInit(ADC_HandleTypeDef* adcHandle)
{
if(adcHandle->Instance==ADC1)
{
/* USER CODE BEGIN ADC1_MspDeInit 0 */
/* USER CODE END ADC1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_ADC1_CLK_DISABLE();
/**ADC1 GPIO Configuration
PA3 ------> ADC1_IN3
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_3);
/* USER CODE BEGIN ADC1_MspDeInit 1 */
/* USER CODE END ADC1_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
queue/Core/Src/freertos.c6.5 KB
/* USER CODE BEGIN Header */
/**
******************************************************************************
* File Name : freertos.c
* Description : Code for freertos applications
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "FreeRTOS.h"
#include "task.h"
#include "main.h"
#include "cmsis_os.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "usart.h"
#include <stdio.h>
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN Variables */
/* USER CODE END Variables */
osThreadId SendHandle;
osThreadId ReceieveHandle;
osThreadId LEDHandle;
osMessageQId myQueueHandle;
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN FunctionPrototypes */
/* USER CODE END FunctionPrototypes */
void StartSend(void const * argument);
void StartReceieve(void const * argument);
void LEDTask(void const * argument);
void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */
/* GetIdleTaskMemory prototype (linked to static allocation support) */
void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize );
/* USER CODE BEGIN GET_IDLE_TASK_MEMORY */
static StaticTask_t xIdleTaskTCBBuffer;
static StackType_t xIdleStack[configMINIMAL_STACK_SIZE];
void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize )
{
*ppxIdleTaskTCBBuffer = &xIdleTaskTCBBuffer;
*ppxIdleTaskStackBuffer = &xIdleStack[0];
*pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
/* place for user code */
}
/* USER CODE END GET_IDLE_TASK_MEMORY */
/**
* @brief FreeRTOS initialization
* @param None
* @retval None
*/
void MX_FREERTOS_Init(void) {
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* USER CODE BEGIN RTOS_MUTEX */
/* add mutexes, ... */
/* USER CODE END RTOS_MUTEX */
/* USER CODE BEGIN RTOS_SEMAPHORES */
/* add semaphores, ... */
/* USER CODE END RTOS_SEMAPHORES */
/* USER CODE BEGIN RTOS_TIMERS */
/* start timers, add new ones, ... */
/* USER CODE END RTOS_TIMERS */
/* Create the queue(s) */
/* definition and creation of myQueue */
osMessageQDef(myQueue, 16, uint16_t);
myQueueHandle = osMessageCreate(osMessageQ(myQueue), NULL);
/* USER CODE BEGIN RTOS_QUEUES */
/* add queues, ... */
/* USER CODE END RTOS_QUEUES */
/* Create the thread(s) */
/* definition and creation of Send */
osThreadDef(Send, StartSend, osPriorityNormal, 0, 128);
SendHandle = osThreadCreate(osThread(Send), NULL);
/* definition and creation of Receieve */
osThreadDef(Receieve, StartReceieve, osPriorityIdle, 0, 128);
ReceieveHandle = osThreadCreate(osThread(Receieve), NULL);
/* definition and creation of LED */
osThreadDef(LED, LEDTask, osPriorityIdle, 0, 128);
LEDHandle = osThreadCreate(osThread(LED), NULL);
/* USER CODE BEGIN RTOS_THREADS */
/* add threads, ... */
/* USER CODE END RTOS_THREADS */
}
/* USER CODE BEGIN Header_StartSend */
/**
* @brief Function implementing the Send thread.
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_StartSend */
void StartSend(void const * argument)
{
/* USER CODE BEGIN StartSend */
uint16_t buf =100;//��������д�뻺����
BaseType_t status;//��������ֵ
/* Infinite loop */
for(;;)
{
if(HAL_GPIO_ReadPin(GPIOB,GPIO_PIN_14)==GPIO_PIN_RESET)
{
osDelay(20);
if(HAL_GPIO_ReadPin(GPIOB,GPIO_PIN_14)==GPIO_PIN_RESET)
{
status = xQueueSend(myQueueHandle,&buf, 0);
if(status == pdTRUE)
{
printf("wirte to the queue succesfully!\r\n");
printf("the buf is %d\r\n",buf);
}
else
printf("failed in writing!\r\n");
}
while(HAL_GPIO_ReadPin(GPIOB,GPIO_PIN_14)==GPIO_PIN_RESET);
}
osDelay(20);
}
/* USER CODE END StartSend */
}
/* USER CODE BEGIN Header_StartReceieve */
/**
* @brief Function implementing the Receieve thread.
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_StartReceieve */
void StartReceieve(void const * argument)
{
/* USER CODE BEGIN StartReceieve */
uint16_t buf = 0;//�������н��ջ�����
BaseType_t status;//��������ֵ
/* Infinite loop */
for(;;)
{
if(HAL_GPIO_ReadPin(GPIOB,GPIO_PIN_13)==GPIO_PIN_RESET)
{
osDelay(20);
if(HAL_GPIO_ReadPin(GPIOB,GPIO_PIN_13)==GPIO_PIN_RESET)
{
status = xQueueReceive(myQueueHandle,&buf, 0);
if(status == pdTRUE)
{
printf("read the queue succesfully!\r\n");
printf("the buf is %d\r\n",buf);
}
else
printf("failed in reading!\r\n");
}
while(HAL_GPIO_ReadPin(GPIOB,GPIO_PIN_13)==GPIO_PIN_RESET);
}
osDelay(20);
}
/* USER CODE END StartReceieve */
}
/* USER CODE BEGIN Header_LEDTask */
/**
* @brief Function implementing the LED thread.
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_LEDTask */
void LEDTask(void const * argument)
{
/* USER CODE BEGIN LEDTask */
/* Infinite loop */
for(;;)
{
HAL_GPIO_TogglePin(GPIOC, GPIO_PIN_13);
osDelay(500);
}
/* USER CODE END LEDTask */
}
/* Private application code --------------------------------------------------*/
/* USER CODE BEGIN Application */
/* USER CODE END Application */
try/Core/Src/freertos.c7.8 KB
/* USER CODE BEGIN Header */
/**
******************************************************************************
* File Name : freertos.c
* Description : Code for freertos applications
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "FreeRTOS.h"
#include "task.h"
#include "main.h"
#include "cmsis_os.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include <stdio.h>
#include "string.h"
#include "usart.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN Variables */
/* USER CODE END Variables */
osThreadId defaultTaskHandle;
osThreadId LEDHandle;
osThreadId KEYHandle;
osThreadId BEEPHandle;
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN FunctionPrototypes */
/* USER CODE END FunctionPrototypes */
void StartDefaultTask(void const * argument);
void LED_LIGHT(void const * argument);
void KEY_Detect(void const * argument);
void BEEP_RUN(void const * argument);
void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */
/* GetIdleTaskMemory prototype (linked to static allocation support) */
void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize );
/* USER CODE BEGIN GET_IDLE_TASK_MEMORY */
static StaticTask_t xIdleTaskTCBBuffer;
static StackType_t xIdleStack[configMINIMAL_STACK_SIZE];
void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize )
{
*ppxIdleTaskTCBBuffer = &xIdleTaskTCBBuffer;
*ppxIdleTaskStackBuffer = &xIdleStack[0];
*pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
/* place for user code */
}
/* USER CODE END GET_IDLE_TASK_MEMORY */
/**
* @brief FreeRTOS initialization
* @param None
* @retval None
*/
void MX_FREERTOS_Init(void) {
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* USER CODE BEGIN RTOS_MUTEX */
/* add mutexes, ... */
/* USER CODE END RTOS_MUTEX */
/* USER CODE BEGIN RTOS_SEMAPHORES */
/* add semaphores, ... */
/* USER CODE END RTOS_SEMAPHORES */
/* USER CODE BEGIN RTOS_TIMERS */
/* start timers, add new ones, ... */
/* USER CODE END RTOS_TIMERS */
/* USER CODE BEGIN RTOS_QUEUES */
/* add queues, ... */
/* USER CODE END RTOS_QUEUES */
/* Create the thread(s) */
/* definition and creation of defaultTask */
osThreadDef(defaultTask, StartDefaultTask, osPriorityNormal, 0, 128);
defaultTaskHandle = osThreadCreate(osThread(defaultTask), NULL);
/* definition and creation of LED */
osThreadDef(LED, LED_LIGHT, osPriorityIdle, 0, 128);
LEDHandle = osThreadCreate(osThread(LED), NULL);
/* definition and creation of KEY */
osThreadDef(KEY, KEY_Detect, osPriorityIdle, 0, 128);
KEYHandle = osThreadCreate(osThread(KEY), NULL);
/* definition and creation of BEEP */
osThreadDef(BEEP, BEEP_RUN, osPriorityIdle, 0, 128);
BEEPHandle = osThreadCreate(osThread(BEEP), NULL);
/* USER CODE BEGIN RTOS_THREADS */
/* add threads, ... */
/* USER CODE END RTOS_THREADS */
}
/* USER CODE BEGIN Header_StartDefaultTask */
/**
* @brief Function implementing the defaultTask thread.
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_StartDefaultTask */
void StartDefaultTask(void const * argument)
{
/* USER CODE BEGIN StartDefaultTask */
HAL_UART_Transmit(&huart1,(uint8_t*)"Task started\r\n",15,HAL_MAX_DELAY);
osThreadTerminate(defaultTaskHandle);//删除任务
defaultTaskHandle = NULL;
/* Infinite loop */
for(;;)
{
osDelay(1);
}
/* USER CODE END StartDefaultTask */
}
/* USER CODE BEGIN Header_LED_LIGHT */
/**
* @brief Function implementing the LED thread.
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_LED_LIGHT */
void LED_LIGHT(void const * argument)
{
/* USER CODE BEGIN LED_LIGHT */
/* Infinite loop */
for(;;)
{
HAL_GPIO_TogglePin(GPIOC, GPIO_PIN_13); // Toggle the LED pin
osDelay(500);
}
/* USER CODE END LED_LIGHT */
}
/* USER CODE BEGIN Header_KEY_Detect */
/**
* @brief Function implementing the KEY thread.
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_KEY_Detect */
void KEY_Detect(void const * argument)
{
/* USER CODE BEGIN KEY_Detect */
/* Infinite loop */
for(;;)
{
if(HAL_GPIO_ReadPin(KEY_GPIO_Port, KEY_Pin) == GPIO_PIN_RESET) // Check if the key is pressed
{
osDelay(20); // Debounce delay
if(HAL_GPIO_ReadPin(KEY_GPIO_Port, KEY_Pin) == GPIO_PIN_RESET) // Check again after debounce
{
// HAL_UART_Transmit(&huart1,(uint8_t*)"Key Pressed\r\n",15,HAL_MAX_DELAY);
if(LEDHandle == NULL)
{
HAL_UART_Transmit(&huart1,(uint8_t*)"LED task is not exist, creating LED task\r\n",40,HAL_MAX_DELAY);
HAL_UART_Transmit(&huart1,(uint8_t*)"BEEP task has existed, delete BEEP task\r\n",40,HAL_MAX_DELAY);
osThreadSuspend(BEEPHandle);//挂起蜂鸣器线程
osThreadDef(led_task, LED_LIGHT, osPriorityNormal, 0, 128);//创建led线程
//#define osThreadDef(name, thread, priority, instances, stacksz)
LEDHandle = osThreadCreate(osThread(led_task), NULL);
if(LEDHandle != NULL)
{
HAL_UART_Transmit(&huart1,(uint8_t*)"LED task created successfully\r\n",32,HAL_MAX_DELAY);
}
}
else
{
HAL_UART_Transmit(&huart1,(uint8_t*)"LED task is running,delete this task\r\n",40,HAL_MAX_DELAY);
HAL_UART_Transmit(&huart1,(uint8_t*)"BEEP task is not exist,creating BEEP task\r\n",40,HAL_MAX_DELAY);
HAL_GPIO_WritePin(Led_GPIO_Port,GPIO_PIN_13,GPIO_PIN_SET);
osThreadResume(BEEPHandle);//恢复蜂鸣器线程
osThreadTerminate(LEDHandle); // 删除LED线程
LEDHandle = NULL; // Reset the handle
}
}
while (HAL_GPIO_ReadPin(KEY_GPIO_Port, KEY_Pin) == GPIO_PIN_RESET);
}
osDelay(50); // Debounce delay
}
/* USER CODE END KEY_Detect */
}
/* USER CODE BEGIN Header_BEEP_RUN */
/**
* @brief Function implementing the BEEP thread.
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_BEEP_RUN */
void BEEP_RUN(void const * argument)
{
/* USER CODE BEGIN BEEP_RUN */
osThreadSuspend(BEEPHandle);//挂起蜂鸣器线程
/* Infinite loop */
for(;;)
{
HAL_GPIO_WritePin(BEEP_GPIO_Port,BEEP_Pin,GPIO_PIN_RESET);
osDelay(100);
HAL_GPIO_WritePin(BEEP_GPIO_Port,BEEP_Pin,GPIO_PIN_SET);
osDelay(1000);
}
/* USER CODE END BEEP_RUN */
}
/* Private application code --------------------------------------------------*/
/* USER CODE BEGIN Application */
/* USER CODE END Application */
Rtos_note/课堂源码/3. tasks_test/tasks_test/Core/Src/freertos.c7.1 KB
/* USER CODE BEGIN Header */
/**
******************************************************************************
* File Name : freertos.c
* Description : Code for freertos applications
******************************************************************************
* @attention
*
* Copyright (c) 2023 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "FreeRTOS.h"
#include "task.h"
#include "main.h"
#include "cmsis_os.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "stdio.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN Variables */
/* USER CODE END Variables */
osThreadId taskLED1Handle;
osThreadId taskLED2Handle;
osThreadId taskKEY1Handle;
osThreadId taskKEY2Handle;
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN FunctionPrototypes */
/* USER CODE END FunctionPrototypes */
void StartTaskLED1(void const * argument);
void StartTaskLED2(void const * argument);
void StartTaskKEY1(void const * argument);
void StartTaskKEY2(void const * argument);
void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */
/* GetIdleTaskMemory prototype (linked to static allocation support) */
void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize );
/* USER CODE BEGIN GET_IDLE_TASK_MEMORY */
static StaticTask_t xIdleTaskTCBBuffer;
static StackType_t xIdleStack[configMINIMAL_STACK_SIZE];
void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize )
{
*ppxIdleTaskTCBBuffer = &xIdleTaskTCBBuffer;
*ppxIdleTaskStackBuffer = &xIdleStack[0];
*pulIdleTaskStackSize = configMINIMAL_STACK_SIZE;
/* place for user code */
}
/* USER CODE END GET_IDLE_TASK_MEMORY */
/**
* @brief FreeRTOS initialization
* @param None
* @retval None
*/
void MX_FREERTOS_Init(void) {
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* USER CODE BEGIN RTOS_MUTEX */
/* add mutexes, ... */
/* USER CODE END RTOS_MUTEX */
/* USER CODE BEGIN RTOS_SEMAPHORES */
/* add semaphores, ... */
/* USER CODE END RTOS_SEMAPHORES */
/* USER CODE BEGIN RTOS_TIMERS */
/* start timers, add new ones, ... */
/* USER CODE END RTOS_TIMERS */
/* USER CODE BEGIN RTOS_QUEUES */
/* add queues, ... */
/* USER CODE END RTOS_QUEUES */
/* Create the thread(s) */
/* definition and creation of taskLED1 */
osThreadDef(taskLED1, StartTaskLED1, osPriorityNormal, 0, 128);
taskLED1Handle = osThreadCreate(osThread(taskLED1), NULL);
/* definition and creation of taskLED2 */
osThreadDef(taskLED2, StartTaskLED2, osPriorityNormal, 0, 128);
taskLED2Handle = osThreadCreate(osThread(taskLED2), NULL);
/* definition and creation of taskKEY1 */
osThreadDef(taskKEY1, StartTaskKEY1, osPriorityNormal, 0, 128);
taskKEY1Handle = osThreadCreate(osThread(taskKEY1), NULL);
/* definition and creation of taskKEY2 */
osThreadDef(taskKEY2, StartTaskKEY2, osPriorityNormal, 0, 128);
taskKEY2Handle = osThreadCreate(osThread(taskKEY2), NULL);
/* USER CODE BEGIN RTOS_THREADS */
/* add threads, ... */
/* USER CODE END RTOS_THREADS */
}
/* USER CODE BEGIN Header_StartTaskLED1 */
/**
* @brief Function implementing the taskLED1 thread.
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_StartTaskLED1 */
void StartTaskLED1(void const * argument)
{
/* USER CODE BEGIN StartTaskLED1 */
/* Infinite loop */
for(;;)
{
HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_8);
osDelay(500);
}
/* USER CODE END StartTaskLED1 */
}
/* USER CODE BEGIN Header_StartTaskLED2 */
/**
* @brief Function implementing the taskLED2 thread.
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_StartTaskLED2 */
void StartTaskLED2(void const * argument)
{
/* USER CODE BEGIN StartTaskLED2 */
/* Infinite loop */
for(;;)
{
HAL_GPIO_TogglePin(GPIOB, GPIO_PIN_9);
osDelay(1000);
}
/* USER CODE END StartTaskLED2 */
}
/* USER CODE BEGIN Header_StartTaskKEY1 */
/**
* @brief Function implementing the taskKEY1 thread.
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_StartTaskKEY1 */
void StartTaskKEY1(void const * argument)
{
/* USER CODE BEGIN StartTaskKEY1 */
/* Infinite loop */
for(;;)
{
if (HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_0) == GPIO_PIN_RESET)
{
osDelay(20);
if (HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_0) == GPIO_PIN_RESET)
{
printf("KEY1按下！\r\n");
if (taskLED1Handle == NULL)
{
printf("任务1不存在，准备创建任务1\r\n");
osThreadDef(taskLED1, StartTaskLED1, osPriorityNormal, 0, 128);
taskLED1Handle = osThreadCreate(osThread(taskLED1), NULL);
if (taskLED1Handle != NULL)
printf("任务1创建完成！\r\n");
}
else
{
printf("删除任务1\r\n");
osThreadTerminate(taskLED1Handle);
taskLED1Handle = NULL;
}
}
while (HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_0) == GPIO_PIN_RESET);
}
osDelay(10);
}
/* USER CODE END StartTaskKEY1 */
}
/* USER CODE BEGIN Header_StartTaskKEY2 */
/**
* @brief Function implementing the taskKEY2 thread.
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_StartTaskKEY2 */
void StartTaskKEY2(void const * argument)
{
/* USER CODE BEGIN StartTaskKEY2 */
static int flag = 0;
/* Infinite loop */
for(;;)
{
if (HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_1) == GPIO_PIN_RESET)
{
osDelay(20);
if (HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_1) == GPIO_PIN_RESET)
{
printf("KEY2按下！\r\n");
if (flag == 0)
{
osThreadSuspend(taskLED2Handle);
printf("任务2已暂停\r\n");
flag = 1;
}
else
{
osThreadResume(taskLED2Handle);
printf("任务2已恢复\r\n");
flag = 0;
}
}
while (HAL_GPIO_ReadPin(GPIOA, GPIO_PIN_1) == GPIO_PIN_RESET);
}
osDelay(10);
}
/* USER CODE END StartTaskKEY2 */
}
/* Private application code --------------------------------------------------*/
/* USER CODE BEGIN Application */
/* USER CODE END Application */
all_code/Core/Src/freertos.c12.1 KB
/* USER CODE BEGIN Header */
/**
******************************************************************************
* File Name : freertos.c
* Description : Code for freertos applications
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "FreeRTOS.h"
#include "task.h"
#include "main.h"
#include "cmsis_os.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "Oled.h"
#include "mpu6050.h"
#include "dht11.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN Variables */
/* I2C句柄声明 */
extern I2C_HandleTypeDef hi2c1;
/* MPU6050设备句柄 */
MPU6050_Handle_t hmpu;
/* MPU6050就绪标志 */
volatile uint8_t g_mpu_ready = 0;
/* DHT11设备句柄 */
DHT11_Handle_t hdht11;
/* 接口函数实现 */
static uint8_t MPU_Write(uint8_t devAddr, uint8_t reg, uint8_t data)
{
return HAL_I2C_Mem_Write(&hi2c1, devAddr, reg, I2C_MEMADD_SIZE_8BIT, &data, 1, 1000) == HAL_OK ? 0 : 1;
}
static uint8_t MPU_Read(uint8_t devAddr, uint8_t reg, uint8_t *data, uint8_t len)
{
return HAL_I2C_Mem_Read(&hi2c1, devAddr, reg, I2C_MEMADD_SIZE_8BIT, data, len, 1000) == HAL_OK ? 0 : 1;
}
static void MPU_Delay(uint32_t ms)
{
osDelay(ms);
}
/* USER CODE END Variables */
/* Definitions for defaultTask */
osThreadId_t defaultTaskHandle;
const osThreadAttr_t defaultTask_attributes = {
.name = "defaultTask",
.stack_size = 128 * 4,
.priority = (osPriority_t) osPriorityNormal,
};
/* Definitions for oled */
osThreadId_t oledHandle;
const osThreadAttr_t oled_attributes = {
.name = "oled",
.stack_size = 512 * 4,
.priority = (osPriority_t) osPriorityRealtime,
};
/* Definitions for mpu6050 */
osThreadId_t mpu6050Handle;
const osThreadAttr_t mpu6050_attributes = {
.name = "mpu6050",
.stack_size = 512 * 4,
.priority = (osPriority_t) osPriorityRealtime7,
};
/* Definitions for dht22 */
osThreadId_t dht22Handle;
const osThreadAttr_t dht22_attributes = {
.name = "dht22",
.stack_size = 512 * 4,
.priority = (osPriority_t) osPriorityAboveNormal,
};
/* Definitions for angle_queue */
osMessageQueueId_t angle_queueHandle;
const osMessageQueueAttr_t angle_queue_attributes = {
.name = "angle_queue"
};
/* Definitions for dht22_queue */
osMessageQueueId_t dht22_queueHandle;
const osMessageQueueAttr_t dht22_queue_attributes = {
.name = "dht22_queue"
};
/* Definitions for dht22_humi_queue */
osMessageQueueId_t dht22_humi_queueHandle;
const osMessageQueueAttr_t dht22_humi_queue_attributes = {
.name = "dht22_humi_queue"
};
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN FunctionPrototypes */
/* USER CODE END FunctionPrototypes */
void StartDefaultTask(void *argument);
void data_show(void *argument);
void mpu6050_run(void *argument);
void DHT22_Run(void *argument);
void MX_FREERTOS_Init(void); /* (MISRA C 2004 rule 8.1) */
/* Hook prototypes */
void vApplicationMallocFailedHook(void);
/* USER CODE BEGIN 5 */
void vApplicationMallocFailedHook(void)
{
/* vApplicationMallocFailedHook() will only be called if
configUSE_MALLOC_FAILED_HOOK is set to 1 in FreeRTOSConfig.h. It is a hook
function that will get called if a call to pvPortMalloc() fails.
pvPortMalloc() is called internally by the kernel whenever a task, queue,
timer or semaphore is created. It is also called by various parts of the
demo application. If heap_1.c or heap_2.c are used, then the size of the
heap available to pvPortMalloc() is defined by configTOTAL_HEAP_SIZE in
FreeRTOSConfig.h, and the xPortGetFreeHeapSize() API function can be used
to query the size of free heap space that remains (although it does not
provide information on how the remaining heap might be fragmented). */
}
/* USER CODE END 5 */
/**
* @brief FreeRTOS initialization
* @param None
* @retval None
*/
void MX_FREERTOS_Init(void) {
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* USER CODE BEGIN RTOS_MUTEX */
/* add mutexes, ... */
/* USER CODE END RTOS_MUTEX */
/* USER CODE BEGIN RTOS_SEMAPHORES */
/* add semaphores, ... */
/* USER CODE END RTOS_SEMAPHORES */
/* USER CODE BEGIN RTOS_TIMERS */
/* start timers, add new ones, ... */
/* USER CODE END RTOS_TIMERS */
/* Create the queue(s) */
/* creation of angle_queue */
angle_queueHandle = osMessageQueueNew (3, sizeof(MPU6050_EulerAngle_t), &angle_queue_attributes);
/* creation of dht22_queue */
dht22_queueHandle = osMessageQueueNew (3, sizeof(float), &dht22_queue_attributes);
/* creation of dht22_humi_queue */
dht22_humi_queueHandle = osMessageQueueNew (3, sizeof(float), &dht22_humi_queue_attributes);
/* USER CODE BEGIN RTOS_QUEUES */
/* add queues, ... */
/* USER CODE END RTOS_QUEUES */
/* Create the thread(s) */
/* creation of defaultTask */
defaultTaskHandle = osThreadNew(StartDefaultTask, NULL, &defaultTask_attributes);
/* creation of oled */
oledHandle = osThreadNew(data_show, NULL, &oled_attributes);
/* creation of mpu6050 */
mpu6050Handle = osThreadNew(mpu6050_run, NULL, &mpu6050_attributes);
/* creation of dht22 */
dht22Handle = osThreadNew(DHT22_Run, NULL, &dht22_attributes);
/* USER CODE BEGIN RTOS_THREADS */
/* add threads, ... */
/* USER CODE END RTOS_THREADS */
/* USER CODE BEGIN RTOS_EVENTS */
/* add events, ... */
/* USER CODE END RTOS_EVENTS */
}
/* USER CODE BEGIN Header_StartDefaultTask */
/**
* @brief Function implementing the defaultTask thread.
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_StartDefaultTask */
void StartDefaultTask(void *argument)
{
/* USER CODE BEGIN StartDefaultTask */
/* Infinite loop */
for (;;)
{
HAL_GPIO_TogglePin(GPIOC, GPIO_PIN_13);
osDelay(250);
}
/* USER CODE END StartDefaultTask */
}
/* USER CODE BEGIN Header_data_show */
/**
* @brief Function implementing the oled thread.
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_data_show */
void data_show(void *argument)
{
/* USER CODE BEGIN data_show */
OLED_Init();
OLED_Clear();
MPU6050_EulerAngle_t angle = {0};
float temperature = 0.0f;
float humidity = 0.0f;
/* Infinite loop */
for (;;)
{
uint8_t updated = 0;
if (osMessageQueueGet(angle_queueHandle, &angle, NULL, 200) == osOK)
{
updated = 1;
}
if (osMessageQueueGet(dht22_queueHandle, &temperature, NULL, 200) == osOK)
{
updated = 1;
}
if (osMessageQueueGet(dht22_humi_queueHandle, &humidity, NULL, 200) == osOK)
{
updated = 1;
}
if (updated)
{
OLED_Printf(0, 0, OLED_FONT_6X12, "R:%+7.2f", angle.roll);
OLED_Printf(0, 2, OLED_FONT_6X12, "P:%+7.2f", angle.pitch);
OLED_Printf(0, 4, OLED_FONT_6X12, "Y:%+7.2f", angle.yaw);
OLED_Printf(0, 6, OLED_FONT_6X12, "T:%6.1f H:%6.1f", temperature,humidity);
}
}
/* USER CODE END data_show */
}
/* USER CODE BEGIN Header_mpu6050_run */
/**
* @brief Function implementing the mpu6050 thread.
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_mpu6050_run */
void mpu6050_run(void *argument)
{
/* USER CODE BEGIN mpu6050_run */
MPU6050_EulerAngle_t angle; /* 三轴姿态角度变量 */
TickType_t xLastWakeTime;
const TickType_t xPeriod = pdMS_TO_TICKS(10); /* 10ms = 100Hz */
/* 初始化MPU6050句柄 */
hmpu.WriteReg = MPU_Write;
hmpu.ReadReg = MPU_Read;
hmpu.DelayMs = MPU_Delay;
hmpu.devAddr = 0xD0; /* AD0接地 */
hmpu.mahonyKp = 0.1f; /* 滤波系数 */
/* 初始化MPU6050 */
MPU6050_Init(&hmpu);
/* 延时等待传感器内部电路稳定，防止校准数据不准 */
osDelay(500);
/* 陀螺仪零偏校准 (确保传感器静止水平放置) */
MPU6050_CalibrateGyro(&hmpu);
/* 设置当前Yaw为零点 */
MPU6050_SetYawZero(&hmpu);
/* 获取当前时间 */
xLastWakeTime = xTaskGetTickCount();
for (;;)
{
/* 更新姿态解算，dt=5ms = 0.005s */
MPU6050_UpdateAttitude(&hmpu, 0.01f);
/* 获取欧拉角 */
MPU6050_GetEulerAngles(&hmpu, &angle);
/* Send to Queue (every 20th sample = 10Hz) */
static uint8_t displayCnt = 0;
if (++displayCnt >= 20)
{
displayCnt = 0;
osMessageQueuePut(angle_queueHandle, &angle, 0, 0);
}
/* 精确定时，200Hz更新频率 */
/**
* @brief 使用“绝对时间”方式阻塞当前任务，保证任务以固定周期运行（无累积漂移）。
*
* @details
* vTaskDelayUntil() 会根据上一次唤醒时刻 @p xLastWakeTime 与周期 @p xPeriod
* 计算下一次应当唤醒的时间点，并将当前任务阻塞到该时间点。
* 与 vTaskDelay() 的相对延时不同，该方式能在任务执行时间有抖动时仍保持稳定的周期节拍，
* 避免每次“延时 + 执行耗时”导致的周期逐渐漂移。
*
* @param[in,out] xLastWakeTime
* 指向上次唤醒时刻（Tick 计数）的变量指针。首次调用前通常应初始化为 xTaskGetTickCount()；
* 函数内部会更新该值为本次计划的唤醒基准，用于下一次调用。
*
* @param[in] xPeriod
* 周期（以 Tick 为单位）。例如：pdMS_TO_TICKS(10) 表示 10ms 周期（取决于 tick 频率）。
*
* @note
* 适用于周期性任务主循环（如 while(1) 中）以实现稳定的周期调度。
*/
vTaskDelayUntil(&xLastWakeTime, xPeriod);
}
/* USER CODE END mpu6050_run */
}
/* USER CODE BEGIN Header_DHT22_Run */
/**
* @brief Function implementing the dht22 thread.
* @param argument: Not used
* @retval None
*/
/* USER CODE END Header_DHT22_Run */
void DHT22_Run(void *argument)
{
/* USER CODE BEGIN DHT22_Run */
DHT11_Data_t dht11_data;
uint8_t ret;
osPriority_t old_priority;
uint32_t error_count = 0;
static uint8_t last_error = 0;
hdht11.port = GPIOA;
hdht11.pin = GPIO_PIN_1;
DHT11_Init(&hdht11);
for(;;)
{
old_priority = osThreadGetPriority(dht22Handle);
osThreadSetPriority(dht22Handle, osPriorityRealtime7);
ret = DHT11_ReadData(&hdht11, &dht11_data);
osThreadSetPriority(dht22Handle, old_priority);
if (ret == 0)
{
float temp = dht11_data.temperature_int + dht11_data.temperature_dec * 0.1f;
float humi = dht11_data.humidity_int + dht11_data.humidity_dec * 0.1f;
osMessageQueuePut(dht22_queueHandle, &temp, 0, 0);
osMessageQueuePut(dht22_humi_queueHandle, &humi, 0, 0);
error_count = 0;
last_error = 0;
}
else
{
error_count++;
last_error = ret;
if (error_count > 5)
{
DHT11_Init(&hdht11);
error_count = 0;
}
}
osDelay(2000);
}
/* USER CODE END DHT22_Run */
}
/* Private application code --------------------------------------------------*/
/* USER CODE BEGIN Application */
/* USER CODE END Application */
all_code/Core/Src/gpio.c3.2 KB
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file gpio.c
* @brief This file provides code for the configuration
* of all used GPIO pins.
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "gpio.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/*----------------------------------------------------------------------------*/
/* Configure GPIO */
/*----------------------------------------------------------------------------*/
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/** Configure pins as
* Analog
* Input
* Output
* EVENT_OUT
* EXTI
*/
void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOC_CLK_ENABLE();
__HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOC, GPIO_PIN_13, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_1, GPIO_PIN_SET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_RESET);
/*Configure GPIO pin : PC13 */
GPIO_InitStruct.Pin = GPIO_PIN_13;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
/*Configure GPIO pin : PA1 */
GPIO_InitStruct.Pin = GPIO_PIN_1;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_NOPULL;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/*Configure GPIO pins : PB0 PB1 PB11 PB12
PB14 PB8 */
GPIO_InitStruct.Pin = GPIO_PIN_0|GPIO_PIN_1|GPIO_PIN_11|GPIO_PIN_12
|GPIO_PIN_14|GPIO_PIN_8;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/*Configure GPIO pin : PA8 */
GPIO_InitStruct.Pin = GPIO_PIN_8;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/*Configure GPIO pin : PB5 */
GPIO_InitStruct.Pin = GPIO_PIN_5;
GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
GPIO_InitStruct.Pull = GPIO_PULLUP;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* EXTI interrupt init*/
HAL_NVIC_SetPriority(EXTI9_5_IRQn, 5, 0);
HAL_NVIC_EnableIRQ(EXTI9_5_IRQn);
}
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
all_code/Core/Src/i2c.c2.9 KB
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file i2c.c
* @brief This file provides code for the configuration
* of the I2C instances.
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "i2c.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
I2C_HandleTypeDef hi2c1;
/* I2C1 init function */
void MX_I2C1_Init(void)
{
/* USER CODE BEGIN I2C1_Init 0 */
/* USER CODE END I2C1_Init 0 */
/* USER CODE BEGIN I2C1_Init 1 */
/* USER CODE END I2C1_Init 1 */
hi2c1.Instance = I2C1;
hi2c1.Init.ClockSpeed = 100000;
hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
hi2c1.Init.OwnAddress1 = 0;
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
hi2c1.Init.OwnAddress2 = 0;
hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
if (HAL_I2C_Init(&hi2c1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN I2C1_Init 2 */
/* USER CODE END I2C1_Init 2 */
}
void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(i2cHandle->Instance==I2C1)
{
/* USER CODE BEGIN I2C1_MspInit 0 */
/* USER CODE END I2C1_MspInit 0 */
__HAL_RCC_GPIOB_CLK_ENABLE();
/**I2C1 GPIO Configuration
PB6 ------> I2C1_SCL
PB7 ------> I2C1_SDA
*/
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* I2C1 clock enable */
__HAL_RCC_I2C1_CLK_ENABLE();
/* USER CODE BEGIN I2C1_MspInit 1 */
/* USER CODE END I2C1_MspInit 1 */
}
}
void HAL_I2C_MspDeInit(I2C_HandleTypeDef* i2cHandle)
{
if(i2cHandle->Instance==I2C1)
{
/* USER CODE BEGIN I2C1_MspDeInit 0 */
/* USER CODE END I2C1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_I2C1_CLK_DISABLE();
/**I2C1 GPIO Configuration
PB6 ------> I2C1_SCL
PB7 ------> I2C1_SDA
*/
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6);
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7);
/* USER CODE BEGIN I2C1_MspDeInit 1 */
/* USER CODE END I2C1_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
all_code/Core/Src/main.c6.2 KB
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "cmsis_os.h"
#include "adc.h"
#include "i2c.h"
#include "spi.h"
#include "tim.h"
#include "gpio.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
void MX_FREERTOS_Init(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_ADC1_Init();
MX_I2C1_Init();
MX_SPI1_Init();
MX_TIM2_Init();
/* USER CODE BEGIN 2 */
delay_init();
HAL_GPIO_WritePin(GPIOA, GPIO_PIN_8, GPIO_PIN_SET);
/* USER CODE END 2 */
/* Init scheduler */
osKernelInitialize(); /* Call init function for freertos objects (in cmsis_os2.c) */
MX_FREERTOS_Init();
/* Start scheduler */
osKernelStart();
/* We should never get here as control is now taken by the scheduler */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
}
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
RCC_PeriphCLKInitTypeDef PeriphClkInit = {0};
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
RCC_OscInitStruct.HSEState = RCC_HSE_ON;
RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV1;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL9;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
{
Error_Handler();
}
PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
{
Error_Handler();
}
}
/* USER CODE BEGIN 4 */
/* USER CODE END 4 */
/**
* @brief Period elapsed callback in non blocking mode
* @note This function is called when TIM4 interrupt took place, inside
* HAL_TIM_IRQHandler(). It makes a direct call to HAL_IncTick() to increment
* a global variable "uwTick" used as application time base.
* @param htim : TIM handle
* @retval None
*/
void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim)
{
/* USER CODE BEGIN Callback 0 */
/* USER CODE END Callback 0 */
if (htim->Instance == TIM4)
{
HAL_IncTick();
}
/* USER CODE BEGIN Callback 1 */
/* USER CODE END Callback 1 */
}
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
{
}
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */
all_code/.cmsis/include/cachel1_armv7.h11.8 KB
/******************************************************************************
* @file cachel1_armv7.h
* @brief CMSIS Level 1 Cache API for Armv7-M and later
* @version V1.0.1
* @date 19. April 2021
******************************************************************************/
/*
* Copyright (c) 2020-2021 Arm Limited. All rights reserved.
*
* SPDX-License-Identifier: Apache-2.0
*
* Licensed under the Apache License, Version 2.0 (the License); you may
* not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an AS IS BASIS, WITHOUT
* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*/
#if defined ( __ICCARM__ )
#pragma system_include /* treat file as system include file for MISRA check */
#elif defined (__clang__)
#pragma clang system_header /* treat file as system include file */
#endif
#ifndef ARM_CACHEL1_ARMV7_H
#define ARM_CACHEL1_ARMV7_H
/**
\ingroup CMSIS_Core_FunctionInterface
\defgroup CMSIS_Core_CacheFunctions Cache Functions
\brief Functions that configure Instruction and Data cache.
@{
*/
/* Cache Size ID Register Macros */
#define CCSIDR_WAYS(x) (((x) & SCB_CCSIDR_ASSOCIATIVITY_Msk) >> SCB_CCSIDR_ASSOCIATIVITY_Pos)
#define CCSIDR_SETS(x) (((x) & SCB_CCSIDR_NUMSETS_Msk ) >> SCB_CCSIDR_NUMSETS_Pos )
#ifndef __SCB_DCACHE_LINE_SIZE
#define __SCB_DCACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
#endif
#ifndef __SCB_ICACHE_LINE_SIZE
#define __SCB_ICACHE_LINE_SIZE 32U /*!< Cortex-M7 cache line size is fixed to 32 bytes (8 words). See also register SCB_CCSIDR */
#endif
/**
\brief Enable I-Cache
\details Turns on I-Cache
*/
__STATIC_FORCEINLINE void SCB_EnableICache (void)
{
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
if (SCB->CCR & SCB_CCR_IC_Msk) return; /* return if ICache is already enabled */
__DSB();
__ISB();
SCB->ICIALLU = 0UL; /* invalidate I-Cache */
__DSB();
__ISB();
SCB->CCR |= (uint32_t)SCB_CCR_IC_Msk; /* enable I-Cache */
__DSB();
__ISB();
#endif
}
/**
\brief Disable I-Cache
\details Turns off I-Cache
*/
__STATIC_FORCEINLINE void SCB_DisableICache (void)
{
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
__DSB();
__ISB();
SCB->CCR &= ~(uint32_t)SCB_CCR_IC_Msk; /* disable I-Cache */
SCB->ICIALLU = 0UL; /* invalidate I-Cache */
__DSB();
__ISB();
#endif
}
/**
\brief Invalidate I-Cache
\details Invalidates I-Cache
*/
__STATIC_FORCEINLINE void SCB_InvalidateICache (void)
{
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
__DSB();
__ISB();
SCB->ICIALLU = 0UL;
__DSB();
__ISB();
#endif
}
/**
\brief I-Cache Invalidate by address
\details Invalidates I-Cache for the given address.
I-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
I-Cache memory blocks which are part of given address + given size are invalidated.
\param[in] addr address
\param[in] isize size of memory block (in number of bytes)
*/
__STATIC_FORCEINLINE void SCB_InvalidateICache_by_Addr (volatile void *addr, int32_t isize)
{
#if defined (__ICACHE_PRESENT) && (__ICACHE_PRESENT == 1U)
if ( isize > 0 ) {
int32_t op_size = isize + (((uint32_t)addr) & (__SCB_ICACHE_LINE_SIZE - 1U));
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_ICACHE_LINE_SIZE - 1U) */;
__DSB();
do {
SCB->ICIMVAU = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
op_addr += __SCB_ICACHE_LINE_SIZE;
op_size -= __SCB_ICACHE_LINE_SIZE;
} while ( op_size > 0 );
__DSB();
__ISB();
}
#endif
}
/**
\brief Enable D-Cache
\details Turns on D-Cache
*/
__STATIC_FORCEINLINE void SCB_EnableDCache (void)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
uint32_t ccsidr;
uint32_t sets;
uint32_t ways;
if (SCB->CCR & SCB_CCR_DC_Msk) return; /* return if DCache is already enabled */
SCB->CSSELR = 0U; /* select Level 1 data cache */
__DSB();
ccsidr = SCB->CCSIDR;
/* invalidate D-Cache */
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
do {
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
do {
SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) );
#if defined ( __CC_ARM )
__schedule_barrier();
#endif
} while (ways-- != 0U);
} while(sets-- != 0U);
__DSB();
SCB->CCR |= (uint32_t)SCB_CCR_DC_Msk; /* enable D-Cache */
__DSB();
__ISB();
#endif
}
/**
\brief Disable D-Cache
\details Turns off D-Cache
*/
__STATIC_FORCEINLINE void SCB_DisableDCache (void)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
uint32_t ccsidr;
uint32_t sets;
uint32_t ways;
SCB->CSSELR = 0U; /* select Level 1 data cache */
__DSB();
SCB->CCR &= ~(uint32_t)SCB_CCR_DC_Msk; /* disable D-Cache */
__DSB();
ccsidr = SCB->CCSIDR;
/* clean & invalidate D-Cache */
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
do {
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
do {
SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) );
#if defined ( __CC_ARM )
__schedule_barrier();
#endif
} while (ways-- != 0U);
} while(sets-- != 0U);
__DSB();
__ISB();
#endif
}
/**
\brief Invalidate D-Cache
\details Invalidates D-Cache
*/
__STATIC_FORCEINLINE void SCB_InvalidateDCache (void)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
uint32_t ccsidr;
uint32_t sets;
uint32_t ways;
SCB->CSSELR = 0U; /* select Level 1 data cache */
__DSB();
ccsidr = SCB->CCSIDR;
/* invalidate D-Cache */
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
do {
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
do {
SCB->DCISW = (((sets << SCB_DCISW_SET_Pos) & SCB_DCISW_SET_Msk) |
((ways << SCB_DCISW_WAY_Pos) & SCB_DCISW_WAY_Msk) );
#if defined ( __CC_ARM )
__schedule_barrier();
#endif
} while (ways-- != 0U);
} while(sets-- != 0U);
__DSB();
__ISB();
#endif
}
/**
\brief Clean D-Cache
\details Cleans D-Cache
*/
__STATIC_FORCEINLINE void SCB_CleanDCache (void)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
uint32_t ccsidr;
uint32_t sets;
uint32_t ways;
SCB->CSSELR = 0U; /* select Level 1 data cache */
__DSB();
ccsidr = SCB->CCSIDR;
/* clean D-Cache */
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
do {
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
do {
SCB->DCCSW = (((sets << SCB_DCCSW_SET_Pos) & SCB_DCCSW_SET_Msk) |
((ways << SCB_DCCSW_WAY_Pos) & SCB_DCCSW_WAY_Msk) );
#if defined ( __CC_ARM )
__schedule_barrier();
#endif
} while (ways-- != 0U);
} while(sets-- != 0U);
__DSB();
__ISB();
#endif
}
/**
\brief Clean & Invalidate D-Cache
\details Cleans and Invalidates D-Cache
*/
__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache (void)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
uint32_t ccsidr;
uint32_t sets;
uint32_t ways;
SCB->CSSELR = 0U; /* select Level 1 data cache */
__DSB();
ccsidr = SCB->CCSIDR;
/* clean & invalidate D-Cache */
sets = (uint32_t)(CCSIDR_SETS(ccsidr));
do {
ways = (uint32_t)(CCSIDR_WAYS(ccsidr));
do {
SCB->DCCISW = (((sets << SCB_DCCISW_SET_Pos) & SCB_DCCISW_SET_Msk) |
((ways << SCB_DCCISW_WAY_Pos) & SCB_DCCISW_WAY_Msk) );
#if defined ( __CC_ARM )
__schedule_barrier();
#endif
} while (ways-- != 0U);
} while(sets-- != 0U);
__DSB();
__ISB();
#endif
}
/**
\brief D-Cache Invalidate by address
\details Invalidates D-Cache for the given address.
D-Cache is invalidated starting from a 32 byte aligned address in 32 byte granularity.
D-Cache memory blocks which are part of given address + given size are invalidated.
\param[in] addr address
\param[in] dsize size of memory block (in number of bytes)
*/
__STATIC_FORCEINLINE void SCB_InvalidateDCache_by_Addr (volatile void *addr, int32_t dsize)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
if ( dsize > 0 ) {
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
__DSB();
do {
SCB->DCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
op_addr += __SCB_DCACHE_LINE_SIZE;
op_size -= __SCB_DCACHE_LINE_SIZE;
} while ( op_size > 0 );
__DSB();
__ISB();
}
#endif
}
/**
\brief D-Cache Clean by address
\details Cleans D-Cache for the given address
D-Cache is cleaned starting from a 32 byte aligned address in 32 byte granularity.
D-Cache memory blocks which are part of given address + given size are cleaned.
\param[in] addr address
\param[in] dsize size of memory block (in number of bytes)
*/
__STATIC_FORCEINLINE void SCB_CleanDCache_by_Addr (volatile void *addr, int32_t dsize)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
if ( dsize > 0 ) {
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
__DSB();
do {
SCB->DCCMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
op_addr += __SCB_DCACHE_LINE_SIZE;
op_size -= __SCB_DCACHE_LINE_SIZE;
} while ( op_size > 0 );
__DSB();
__ISB();
}
#endif
}
/**
\brief D-Cache Clean and Invalidate by address
\details Cleans and invalidates D_Cache for the given address
D-Cache is cleaned and invalidated starting from a 32 byte aligned address in 32 byte granularity.
D-Cache memory blocks which are part of given address + given size are cleaned and invalidated.
\param[in] addr address (aligned to 32-byte boundary)
\param[in] dsize size of memory block (in number of bytes)
*/
__STATIC_FORCEINLINE void SCB_CleanInvalidateDCache_by_Addr (volatile void *addr, int32_t dsize)
{
#if defined (__DCACHE_PRESENT) && (__DCACHE_PRESENT == 1U)
if ( dsize > 0 ) {
int32_t op_size = dsize + (((uint32_t)addr) & (__SCB_DCACHE_LINE_SIZE - 1U));
uint32_t op_addr = (uint32_t)addr /* & ~(__SCB_DCACHE_LINE_SIZE - 1U) */;
__DSB();
do {
SCB->DCCIMVAC = op_addr; /* register accepts only 32byte aligned values, only bits 31..5 are valid */
op_addr += __SCB_DCACHE_LINE_SIZE;
op_size -= __SCB_DCACHE_LINE_SIZE;
} while ( op_size > 0 );
__DSB();
__ISB();
}
#endif
}
/*@} end of CMSIS_Core_CacheFunctions */
#endif /* ARM_CACHEL1_ARMV7_H */
queue/Core/Inc/FreeRTOSConfig.h5.7 KB
/* USER CODE BEGIN Header */
/*
* FreeRTOS Kernel V10.0.1
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
/* USER CODE END Header */
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* These parameters and more are described within the 'configuration' section of the
* FreeRTOS API documentation available on the FreeRTOS.org web site.
*
* See http://www.freertos.org/a00110.html
*----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* Section where include file can be added */
/* USER CODE END Includes */
/* Ensure definitions are only used by the compiler, and not by the assembler. */
#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
#include <stdint.h>
extern uint32_t SystemCoreClock;
#endif
#define configUSE_PREEMPTION 1
#define configSUPPORT_STATIC_ALLOCATION 1
#define configSUPPORT_DYNAMIC_ALLOCATION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( SystemCoreClock )
#define configTICK_RATE_HZ ((TickType_t)1000)
#define configMAX_PRIORITIES ( 7 )
#define configMINIMAL_STACK_SIZE ((uint16_t)128)
#define configTOTAL_HEAP_SIZE ((size_t)3072)
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_16_BIT_TICKS 0
#define configUSE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 8
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 0
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 1
/* Cortex-M specific definitions. */
#ifdef __NVIC_PRIO_BITS
/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
#define configPRIO_BITS __NVIC_PRIO_BITS
#else
#define configPRIO_BITS 4
#endif
/* The lowest interrupt priority that can be used in a call to a "set priority"
function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
/* The highest interrupt priority that can be used by any interrupt service
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* Normal assert() semantics without relying on the provision of an assert.h
header file. */
/* USER CODE BEGIN 1 */
#define configASSERT( x ) if ((x) == 0) {taskDISABLE_INTERRUPTS(); for( ;; );}
/* USER CODE END 1 */
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
standard names. */
#define vPortSVCHandler SVC_Handler
#define xPortPendSVHandler PendSV_Handler
/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
#define xPortSysTickHandler SysTick_Handler
/* USER CODE BEGIN Defines */
/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
/* USER CODE END Defines */
#endif /* FREERTOS_CONFIG_H */
try/Core/Inc/FreeRTOSConfig.h5.7 KB
/* USER CODE BEGIN Header */
/*
* FreeRTOS Kernel V10.0.1
* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy of
* this software and associated documentation files (the "Software"), to deal in
* the Software without restriction, including without limitation the rights to
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
* the Software, and to permit persons to whom the Software is furnished to do so,
* subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in all
* copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
*
* http://www.FreeRTOS.org
* http://aws.amazon.com/freertos
*
* 1 tab == 4 spaces!
*/
/* USER CODE END Header */
#ifndef FREERTOS_CONFIG_H
#define FREERTOS_CONFIG_H
/*-----------------------------------------------------------
* Application specific definitions.
*
* These definitions should be adjusted for your particular hardware and
* application requirements.
*
* These parameters and more are described within the 'configuration' section of the
* FreeRTOS API documentation available on the FreeRTOS.org web site.
*
* See http://www.freertos.org/a00110.html
*----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* Section where include file can be added */
/* USER CODE END Includes */
/* Ensure definitions are only used by the compiler, and not by the assembler. */
#if defined(__ICCARM__) || defined(__CC_ARM) || defined(__GNUC__)
#include <stdint.h>
extern uint32_t SystemCoreClock;
#endif
#define configUSE_PREEMPTION 1
#define configSUPPORT_STATIC_ALLOCATION 1
#define configSUPPORT_DYNAMIC_ALLOCATION 1
#define configUSE_IDLE_HOOK 0
#define configUSE_TICK_HOOK 0
#define configCPU_CLOCK_HZ ( SystemCoreClock )
#define configTICK_RATE_HZ ((TickType_t)1000)
#define configMAX_PRIORITIES ( 7 )
#define configMINIMAL_STACK_SIZE ((uint16_t)128)
#define configTOTAL_HEAP_SIZE ((size_t)3072)
#define configMAX_TASK_NAME_LEN ( 16 )
#define configUSE_16_BIT_TICKS 0
#define configUSE_MUTEXES 1
#define configQUEUE_REGISTRY_SIZE 8
#define configUSE_PORT_OPTIMISED_TASK_SELECTION 1
/* Co-routine definitions. */
#define configUSE_CO_ROUTINES 0
#define configMAX_CO_ROUTINE_PRIORITIES ( 2 )
/* Set the following definitions to 1 to include the API function, or zero
to exclude the API function. */
#define INCLUDE_vTaskPrioritySet 1
#define INCLUDE_uxTaskPriorityGet 1
#define INCLUDE_vTaskDelete 1
#define INCLUDE_vTaskCleanUpResources 0
#define INCLUDE_vTaskSuspend 1
#define INCLUDE_vTaskDelayUntil 0
#define INCLUDE_vTaskDelay 1
#define INCLUDE_xTaskGetSchedulerState 1
/* Cortex-M specific definitions. */
#ifdef __NVIC_PRIO_BITS
/* __BVIC_PRIO_BITS will be specified when CMSIS is being used. */
#define configPRIO_BITS __NVIC_PRIO_BITS
#else
#define configPRIO_BITS 4
#endif
/* The lowest interrupt priority that can be used in a call to a "set priority"
function. */
#define configLIBRARY_LOWEST_INTERRUPT_PRIORITY 15
/* The highest interrupt priority that can be used by any interrupt service
routine that makes calls to interrupt safe FreeRTOS API functions. DO NOT CALL
INTERRUPT SAFE FREERTOS API FUNCTIONS FROM ANY INTERRUPT THAT HAS A HIGHER
PRIORITY THAN THIS! (higher priorities are lower numeric values. */
#define configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY 5
/* Interrupt priorities used by the kernel port layer itself. These are generic
to all Cortex-M ports, and do not rely on any particular library functions. */
#define configKERNEL_INTERRUPT_PRIORITY ( configLIBRARY_LOWEST_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* !!!! configMAX_SYSCALL_INTERRUPT_PRIORITY must not be set to zero !!!!
See http://www.FreeRTOS.org/RTOS-Cortex-M3-M4.html. */
#define configMAX_SYSCALL_INTERRUPT_PRIORITY ( configLIBRARY_MAX_SYSCALL_INTERRUPT_PRIORITY << (8 - configPRIO_BITS) )
/* Normal assert() semantics without relying on the provision of an assert.h
header file. */
/* USER CODE BEGIN 1 */
#define configASSERT( x ) if ((x) == 0) {taskDISABLE_INTERRUPTS(); for( ;; );}
/* USER CODE END 1 */
/* Definitions that map the FreeRTOS port interrupt handlers to their CMSIS
standard names. */
#define vPortSVCHandler SVC_Handler
#define xPortPendSVHandler PendSV_Handler
/* IMPORTANT: This define is commented when used with STM32Cube firmware, when the timebase source is SysTick,
to prevent overwriting SysTick_Handler defined within STM32Cube HAL */
#define xPortSysTickHandler SysTick_Handler
/* USER CODE BEGIN Defines */
/* Section where parameter definitions can be added (for instance, to override default ones in FreeRTOS.h) */
/* USER CODE END Defines */
#endif /* FREERTOS_CONFIG_H */
all_code/.eide/eide.yml8.2 KB
version: "4.1"
name: all_code
type: ARM
deviceName: null
packDir: null
srcDirs: []
virtualFolder:
name: <virtual_root>
files: []
folders:
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files: []
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folders: []
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files: []
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files:
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- path: Core/Src/gpio.c
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- path: Core/Src/spi.c
- path: Core/Src/tim.c
- path: Core/Src/stm32f1xx_it.c
- path: Core/Src/stm32f1xx_hal_msp.c
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folders: []
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folders:
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files:
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- path: Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim.c
- path: Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_tim_ex.c
- path: Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc.c
- path: Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_adc_ex.c
- path: Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal.c
- path: Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc.c
- path: Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_rcc_ex.c
- path: Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_gpio.c
- path: Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_dma.c
- path: Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_cortex.c
- path: Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_pwr.c
- path: Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash.c
- path: Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_flash_ex.c
- path: Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_exti.c
- path: Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_i2c.c
- path: Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_spi.c
folders: []
- name: CMSIS
files:
- path: Core/Src/system_stm32f1xx.c
folders: []
- name: Hardware
files: []
folders:
- name: Delay
files:
- path: Drivers/Hardware/Delay/delay_us.c
- path: Drivers/Hardware/Delay/delay_us.h
folders: []
- name: Oled
files:
- path: Drivers/Hardware/OLED/font.h
- path: Drivers/Hardware/OLED/Oled.c
- path: Drivers/Hardware/OLED/Oled.h
- path: Drivers/Hardware/OLED/soft_oled.c
- path: Drivers/Hardware/OLED/soft_oled.h
folders: []
- name: MPU6050
files:
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- path: Drivers/Hardware/MPU6050/mpu6050.h
folders: []
- name: DHT11
files:
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- path: Drivers/Hardware/DHT11/dht11.h
folders: []
- name: Middlewares
files: []
folders:
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files:
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- path: Middlewares/Third_Party/FreeRTOS/Source/event_groups.c
- path: Middlewares/Third_Party/FreeRTOS/Source/list.c
- path: Middlewares/Third_Party/FreeRTOS/Source/queue.c
- path: Middlewares/Third_Party/FreeRTOS/Source/stream_buffer.c
- path: Middlewares/Third_Party/FreeRTOS/Source/tasks.c
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- path: Middlewares/Third_Party/FreeRTOS/Source/portable/MemMang/heap_4.c
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folders: []
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folders: []
dependenceList: []
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miscInfo:
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tag: IROM
useCustomScatterFile: false
uploadConfigMap:
JLink:
baseAddr: ""
bin: ""
cpuInfo:
cpuName: "null"
vendor: "null"
otherCmds: ""
proType: 1
speed: 8000
STLink:
address: "0x8000000"
bin: ""
elFile: None
optionBytes: .eide/all_code.st.option.bytes.ini
otherCmds: ""
proType: SWD
resetMode: default
runAfterProgram: true
speed: 4000
uploader: STLink
try/MDK-ARM/.eide.usr.ctx.json23 B
{
"target": "try"
}